summaryrefslogtreecommitdiff
path: root/src/code_800AF9B0.c
diff options
context:
space:
mode:
authorCoderStig <79828759+CoderStig@users.noreply.github.com>2021-11-05 05:17:09 -0600
committerGitHub <noreply@github.com>2021-11-05 05:17:09 -0600
commit8ab4557b393073e8b544e8ceb834f5baddb465de (patch)
tree4e35f1b65eaa814845aab7c137e1cfd17520760c /src/code_800AF9B0.c
parent48f2c2fddec9601759fcd847268547a97dd85f5b (diff)
Split asm using autodecompiler (#49)
* Split asm using autodecompiler * Placed libultra bss and linked more C
Diffstat (limited to 'src/code_800AF9B0.c')
-rw-r--r--src/code_800AF9B0.c2951
1 files changed, 2950 insertions, 1 deletions
diff --git a/src/code_800AF9B0.c b/src/code_800AF9B0.c
index df6139145..bf43bc850 100644
--- a/src/code_800AF9B0.c
+++ b/src/code_800AF9B0.c
@@ -10,4 +10,2953 @@ void func_800AF9B0(void) {
D_8018EDBC = func_802A7B70(7680);
}
-GLOBAL_ASM("asm/non_matchings/code_800AF9B0.s")
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern f32 D_800F2B30;
+extern void *gDisplayListHead;
+
+void func_800AF9E4(s32 arg0, s32 arg1, s32 arg2, s32 arg3, s16 arg4, s16 arg5, s32 arg6, s32 arg7) {
+ f32 temp_f0;
+ s32 temp_a1;
+ s32 temp_lo;
+ s32 temp_t1;
+ s32 temp_v0;
+ void *temp_a3;
+ void *temp_a3_2;
+ void *temp_a3_3;
+ void *temp_a3_4;
+ void *temp_a3_5;
+ void *temp_v1;
+ s32 phi_v0;
+ s16 phi_t6;
+ s32 phi_a1;
+ s32 phi_v1;
+ s32 phi_v0_2;
+
+ temp_lo = arg2 * arg3;
+ temp_f0 = D_800F2B30;
+ phi_v0 = 0;
+ phi_v0_2 = 0;
+ do {
+ temp_v1 = arg0 + (phi_v0 * 0x10);
+ temp_a1 = phi_v0 % 2;
+ temp_t1 = arg1 + 1;
+ temp_v1->unk0 = ((temp_a1 * arg7) + arg6) - 0x1F8;
+ temp_v0 = phi_v0 + 1;
+ phi_v0 = temp_v0;
+ if ((phi_v0 / 2) == 0) {
+ temp_v1->unk2 = temp_lo - 0x1A4;
+ } else {
+ temp_v1->unk2 = (temp_lo + arg3) - 0x1A4;
+ }
+ if (temp_a1 == 0) {
+ phi_t6 = temp_v1->unk2 + ((arg1 * arg1) * temp_f0);
+ } else {
+ phi_t6 = temp_v1->unk2 + ((temp_t1 * temp_t1) * temp_f0);
+ }
+ temp_v1->unk2 = phi_t6;
+ temp_v1->unkC = 0;
+ temp_v1->unkD = 0;
+ temp_v1->unkE = 0x78;
+ temp_v1->unkF = 0xFF;
+ if (temp_a1 == 0) {
+ temp_v1->unk4 = arg4;
+ } else {
+ temp_v1->unk4 = arg5;
+ }
+ } while (temp_v0 != 4);
+ if ((((arg1 / 2) + (arg2 / 2)) & 1) == 0) {
+ phi_a1 = 0;
+ phi_v1 = 0;
+ } else {
+ phi_a1 = 0xFF;
+ phi_v1 = 0xFF;
+ phi_v0_2 = 0xFF;
+ }
+ temp_a3 = gDisplayListHead;
+ gDisplayListHead = temp_a3 + 8;
+ temp_a3->unk0 = 0xFA000000;
+ temp_a3->unk4 = (phi_a1 << 0x18) | ((phi_v1 & 0xFF) << 0x10) | ((phi_v0_2 & 0xFF) << 8) | 0xFF;
+ temp_a3_2 = gDisplayListHead;
+ gDisplayListHead = temp_a3_2 + 8;
+ temp_a3_2->unk4 = 0;
+ temp_a3_2->unk0 = 0xE7000000;
+ temp_a3_3 = gDisplayListHead;
+ gDisplayListHead = temp_a3_3 + 8;
+ temp_a3_3->unk0 = 0x400103F;
+ temp_a3_3->unk4 = arg0 + 0x80000000;
+ temp_a3_4 = gDisplayListHead;
+ gDisplayListHead = temp_a3_4 + 8;
+ temp_a3_4->unk4 = 0x20400;
+ temp_a3_4->unk0 = 0xBF000000;
+ temp_a3_5 = gDisplayListHead;
+ gDisplayListHead = temp_a3_5 + 8;
+ temp_a3_5->unk4 = 0x60402;
+ temp_a3_5->unk0 = 0xBF000000;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800AF9E4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern f64 D_800F2B38;
+extern f32 D_800F2B40;
+
+void func_800AFC54(s32 arg0, s32 arg1, s32 arg2, s32 arg3, void *arg4) {
+ s32 sp3C;
+ s32 sp38;
+ s32 sp34;
+ f32 sp20;
+ f32 sp1C;
+ f32 sp18;
+ f32 temp_f0;
+ f32 temp_f14;
+ f32 temp_f16;
+ f32 temp_f18;
+ f32 temp_f2;
+ s16 temp_t1;
+ s16 temp_t2;
+ s16 temp_t3;
+ s16 temp_t6;
+ s16 temp_t7;
+ s16 temp_t9;
+ s32 temp_a0;
+ s32 temp_a1;
+ s32 temp_a2;
+ s32 temp_a3;
+ s32 temp_v0_2;
+ s32 temp_v1_2;
+ void *temp_t0;
+ void *temp_v0;
+ void *temp_v1;
+ f32 phi_f2;
+
+ temp_v0 = (arg1 * 0x10) + arg0;
+ temp_v1 = (arg2 * 0x10) + arg0;
+ temp_t0 = (arg3 * 0x10) + arg0;
+ temp_t9 = temp_t0->unk0;
+ temp_t1 = temp_v1->unk0;
+ temp_t2 = temp_v1->unk2;
+ temp_t3 = temp_v1->unk4;
+ sp3C = temp_t9;
+ temp_t6 = temp_t0->unk2;
+ temp_v0_2 = temp_t2 - temp_v0->unk2;
+ temp_a0 = temp_t3 - temp_v0->unk4;
+ sp38 = temp_t6;
+ temp_t7 = temp_t0->unk4;
+ temp_a1 = temp_t6 - temp_t2;
+ temp_v1_2 = temp_t7 - temp_t3;
+ sp34 = temp_t7;
+ temp_a2 = temp_t9 - temp_t1;
+ temp_a3 = temp_t1 - temp_v0->unk0;
+ temp_f14 = (temp_v0_2 * temp_v1_2) - (temp_a0 * temp_a1);
+ sp20 = temp_f14;
+ temp_f16 = (temp_a0 * temp_a2) - (temp_a3 * temp_v1_2);
+ sp1C = temp_f16;
+ temp_f18 = (temp_a3 * temp_a1) - (temp_v0_2 * temp_a2);
+ sp18 = temp_f18;
+ temp_f0 = sqrtf((temp_f14 * temp_f14) + (temp_f16 * temp_f16) + (temp_f18 * temp_f18));
+ phi_f2 = temp_f0;
+ if (temp_f0 < D_800F2B38) {
+ phi_f2 = D_800F2B40;
+ }
+ temp_f2 = 1.0 / phi_f2;
+ arg4->unk0 = temp_f14 * temp_f2 * 120.0f;
+ arg4->unk2 = temp_f16 * temp_f2 * 120.0f;
+ arg4->unk4 = temp_f18 * temp_f2 * 120.0f;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800AFC54.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+void func_800AFE00(s32 arg0, s32 arg1, s32 arg2, s32 arg3) {
+ s16 sp1A;
+ s16 sp14;
+ s16 *temp_a1;
+ s16 *temp_a3;
+ s32 temp_v0;
+ s32 temp_v1;
+ void *temp_a1_2;
+ void *temp_a3_2;
+ void *temp_t1;
+ void *temp_t3;
+ s16 *phi_a3;
+ s16 *phi_t0;
+ s16 *phi_a1;
+ s16 *phi_t1;
+ s32 phi_v1;
+ s32 phi_v0;
+ s32 phi_v1_2;
+
+ if (arg2 == 0) {
+ phi_v0 = 0;
+ } else {
+ phi_v0 = arg2 - 1;
+ }
+ phi_a1 = &sp14;
+ if (arg2 == arg3) {
+ phi_v1_2 = arg3;
+ } else {
+ phi_v1_2 = arg2 + 1;
+ }
+ phi_a3 = arg1 + (arg2 * 6);
+ phi_t0 = arg1 + (phi_v0 * 6);
+ phi_t1 = arg1 + (phi_v1_2 * 6);
+ do {
+ temp_a1 = phi_a1 + 2;
+ temp_a3 = phi_a3 + 2;
+ temp_a1->unk-2 = (*phi_a3 + *phi_t0) / 2;
+ temp_a1->unk4 = (temp_a3->unk-2 + *phi_t1) / 2;
+ phi_a3 = temp_a3;
+ phi_t0 += 2;
+ phi_a1 = temp_a1;
+ phi_t1 += 2;
+ } while (temp_a1 != &sp1A);
+ phi_v1 = 0;
+ do {
+ temp_v0 = phi_v1 * 0x10;
+ temp_a1_2 = arg0 + temp_v0;
+ temp_a1_2->unkC = sp14;
+ temp_a3_2 = arg0 + 0x10 + temp_v0;
+ temp_t1 = arg0 + 0x20 + temp_v0;
+ temp_a1_2->unkD = sp16;
+ temp_t3 = arg0 + 0x30 + temp_v0;
+ temp_v1 = phi_v1 + 0x30;
+ temp_a1_2->unkE = sp18;
+ temp_a3_2->unkC = sp1A;
+ temp_a3_2->unkD = sp1C;
+ temp_a3_2->unkE = sp1E;
+ temp_t1->unkC = sp14;
+ temp_t1->unkD = sp16;
+ temp_t1->unkE = sp18;
+ temp_t3->unkC = sp1A;
+ temp_t3->unkD = sp1C;
+ temp_t3->unkE = sp1E;
+ phi_v1 = temp_v1;
+ } while (temp_v1 != 0x1E0);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800AFE00.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800AFC54(s32, ?, ?, ?, ? *); // extern
+? func_800AFE00(s32, ? *, s32, ?); // extern
+
+void func_800AFF58(s32 arg0) {
+ ? sp88;
+ ? sp40;
+ s32 temp_s0;
+ u32 temp_s2;
+ s32 phi_s1;
+ ? *phi_s2;
+ s32 phi_s1_2;
+ s32 phi_s0;
+
+ phi_s1 = 0;
+ phi_s2 = &sp40;
+ phi_s1_2 = 0;
+ do {
+ func_800AFC54((phi_s1 * 0x10) + arg0, 1, 2, 0, phi_s2);
+ temp_s2 = phi_s2 + 6;
+ phi_s1 += 4;
+ phi_s2 = temp_s2;
+ } while (temp_s2 < &sp88);
+ phi_s0 = 0;
+ do {
+ func_800AFE00((phi_s1_2 * 0x10) + arg0, &sp40, phi_s0, 0xB);
+ temp_s0 = phi_s0 + 1;
+ phi_s1_2 += 4;
+ phi_s0 = temp_s0;
+ } while (temp_s0 != 0xC);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800AFF58.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800AF9E4(s32, s32, s32, ?, s32, s32, s32, s32); // extern
+? func_800AFF58(s32); // extern
+f32 func_802B8018(s32); // extern
+extern ? D_800E8680;
+extern ? D_800E8688;
+extern f32 D_800F2B44;
+extern s16 D_8018EDB0;
+extern s16 D_8018EDB2;
+extern s16 D_8018EDB4;
+extern s32 D_8018EDB8;
+extern s32 D_8018EDBC;
+extern void *gDisplayListHead;
+
+void func_800B0004(void) {
+ s32 spBC;
+ s32 sp64;
+ f32 temp_f22;
+ s32 temp_fp;
+ s32 temp_s1;
+ s32 temp_s4;
+ void *temp_a0;
+ void *temp_a1;
+ void *temp_a2;
+ void *temp_a3;
+ void *temp_t0;
+ void *temp_t1;
+ void *temp_v0;
+ void *temp_v0_2;
+ void *temp_v0_3;
+ void *temp_v0_4;
+ s32 phi_s0;
+ s32 phi_s3;
+ s32 phi_fp;
+ s32 phi_s2;
+
+ temp_a0 = gDisplayListHead;
+ gDisplayListHead = temp_a0 + 8;
+ temp_a0->unk0 = 0x3860010;
+ temp_a0->unk4 = &D_800E8688 - 0x80000000;
+ temp_a1 = gDisplayListHead;
+ gDisplayListHead = temp_a1 + 8;
+ temp_a1->unk0 = 0x3880010;
+ temp_a1->unk4 = &D_800E8680 - 0x80000000;
+ temp_a2 = gDisplayListHead;
+ gDisplayListHead = temp_a2 + 8;
+ temp_a2->unk4 = 0x80000040;
+ temp_a2->unk0 = 0xBC000002;
+ temp_a3 = gDisplayListHead;
+ gDisplayListHead = temp_a3 + 8;
+ temp_a3->unk4 = 0x204;
+ temp_a3->unk0 = 0xB7000000;
+ temp_t0 = gDisplayListHead;
+ gDisplayListHead = temp_t0 + 8;
+ temp_t0->unk4 = -0x604;
+ temp_t0->unk0 = 0xFC327E64;
+ temp_t1 = gDisplayListHead;
+ gDisplayListHead = temp_t1 + 8;
+ temp_t1->unk4 = 0x2000;
+ temp_t1->unk0 = 0xB6000000;
+ temp_v0 = gDisplayListHead;
+ gDisplayListHead = temp_v0 + 8;
+ temp_v0->unk4 = 0x20000;
+ temp_v0->unk0 = 0xB7000000;
+ if ((D_8018EDB4 % 2) != 0) {
+ spBC = D_8018EDB8;
+ } else {
+ spBC = D_8018EDBC;
+ }
+ D_8018EDB2 = 0x9C0;
+ temp_f22 = D_800F2B44;
+ sp64 = 0;
+ phi_fp = 0;
+ do {
+ phi_s0 = 0;
+ phi_s3 = 0;
+ phi_s2 = 0;
+loop_5:
+ temp_s1 = phi_s0 + 1;
+ temp_s4 = func_802B8018((D_8018EDB0 - (phi_s0 * D_8018EDB2)) & 0xFFFF) * 84.0f * phi_s0 * temp_f22;
+ func_800AF9E4((phi_s3 * 0x10) + spBC + (sp64 * 0x10), phi_s0, phi_fp, 0x54, temp_s4, func_802B8018((D_8018EDB0 - (temp_s1 * D_8018EDB2)) & 0xFFFF) * 84.0f * temp_s1 * temp_f22, phi_s2, 0x54);
+ phi_s0 = temp_s1;
+ phi_s3 += 4;
+ phi_s2 += 0x54;
+ if (temp_s1 != 0xC) {
+ goto loop_5;
+ }
+ temp_fp = phi_fp + 1;
+ sp64 += 0x30;
+ phi_fp = temp_fp;
+ } while (temp_fp != 0xA);
+ func_800AFF58(spBC);
+ D_8018EDB0 = D_8018EDB0 + D_8018EDB2;
+ D_8018EDB4 = D_8018EDB4 + 1;
+ temp_v0_2 = gDisplayListHead;
+ gDisplayListHead = temp_v0_2 + 8;
+ temp_v0_2->unk0 = 0xB7000000;
+ temp_v0_2->unk4 = 0x2000;
+ temp_v0_3 = gDisplayListHead;
+ gDisplayListHead = temp_v0_3 + 8;
+ temp_v0_3->unk4 = 0x80000040;
+ temp_v0_3->unk0 = 0xBC000002;
+ temp_v0_4 = gDisplayListHead;
+ gDisplayListHead = temp_v0_4 + 8;
+ temp_v0_4->unk4 = 0x20000;
+ temp_v0_4->unk0 = 0xB6000000;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B0004.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B0350:
+
+Unable to determine jump table for jr instruction at func_800B0350.s line 63.
+
+There must be a read of a variable in the same block as
+the instruction, which has a name starting with "jtbl"/"jpt_".
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B0350.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B053C:
+
+Unable to determine jump table for jr instruction at func_800B053C.s line 42.
+
+There must be a read of a variable in the same block as
+the instruction, which has a name starting with "jtbl"/"jpt_".
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B053C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_8009E1C0(); // extern
+? func_8009E258(); // extern
+s32 func_800B4520(u16); // extern
+? play_sound2(?, s8 *); // extern
+extern s8 D_8018EDEC;
+extern s8 D_8018EDF7;
+extern s8 D_8018EDF8;
+
+void func_800B13B0(void *arg0, ? arg1) {
+ u16 sp1E;
+ s32 sp18;
+ s8 temp_v0;
+ s8 temp_v0_2;
+ s8 temp_v0_3;
+ s8 temp_v0_4;
+ u16 temp_t8;
+ u16 phi_a1;
+ s8 *phi_a1_2;
+
+ temp_t8 = (arg0->unk6 | arg0->unkC) & 0xFFFF;
+ phi_a1 = temp_t8;
+ if ((gEnableDebugMode == 0) && ((temp_t8 & 0x1000) != 0)) {
+ phi_a1 = (temp_t8 | 0x8000) & 0xFFFF;
+ }
+ sp1E = phi_a1;
+ if (func_800B4520(phi_a1) == 0) {
+ if (D_8018EDEC == 1) {
+ if ((phi_a1 & 0x400) != 0) {
+ temp_v0 = D_8018EDF7;
+ if ((temp_v0 % 4) != 3) {
+ D_8018EDF7 = temp_v0 + 1;
+ sp18 = phi_a1;
+ play_sound2(0x49008000, &D_8018EDF7);
+ }
+ }
+ if ((phi_a1 & 0x800) != 0) {
+ temp_v0_2 = D_8018EDF7;
+ if ((temp_v0_2 & 3) != 0) {
+ D_8018EDF7 = temp_v0_2 - 1;
+ sp18 = phi_a1;
+ play_sound2(0x49008000, &D_8018EDF7);
+ }
+ }
+ phi_a1_2 = &D_8018EDF7;
+ if ((phi_a1 & 0x100) != 0) {
+ temp_v0_3 = D_8018EDF7;
+ if ((temp_v0_3 / 4) != 3) {
+ D_8018EDF7 = temp_v0_3 + 4;
+ sp18 = phi_a1;
+ play_sound2(0x49008000, &D_8018EDF7);
+ phi_a1_2 = &D_8018EDF7;
+ }
+ }
+ if ((phi_a1 & 0x200) != 0) {
+ temp_v0_4 = *phi_a1_2;
+ if ((temp_v0_4 / 4) != 0) {
+ *phi_a1_2 = temp_v0_4 - 4;
+ sp18 = phi_a1;
+ play_sound2(0x49008000, phi_a1_2);
+ }
+ }
+ if ((phi_a1 & 0x4000) != 0) {
+ func_8009E258();
+ play_sound2(0x49008002);
+ return;
+ }
+ if ((phi_a1 & 0x8000) != 0) {
+ D_8018EDF8 = 0;
+ func_8009E1C0();
+ play_sound2(0x49008016);
+ return;
+ }
+ // Duplicate return node #23. Try simplifying control flow for better match
+ return;
+ }
+ if ((phi_a1 & 0x8000) != 0) {
+ func_8009E258();
+ play_sound2(0x49008016);
+ }
+ // Duplicate return node #23. Try simplifying control flow for better match
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B13B0.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_8009E208(?); // extern
+void *func_800AAEF4(?, s8); // extern
+s32 func_800B4520(); // extern
+? func_800B4728(s8, s8, void *, s32); // extern
+? func_800B559C(s8); // extern
+s32 func_800B639C(s8, s8, void *, s32); // extern
+s32 func_800B69BC(s32, s32); // extern
+? play_sound2(?, s32); // extern
+extern f64 D_800F2D90;
+extern f64 D_800F2D98;
+extern f64 D_800F2DA0;
+extern f64 D_800F2DA8;
+extern f64 D_800F2DB0;
+extern ? D_8018EB90;
+extern s8 D_8018EDEC;
+extern s8 D_8018EDF7;
+extern s8 D_8018EDF8;
+extern s8 D_8018EDF9;
+
+void func_800B15AC(void *arg0, ? arg1) {
+ u16 sp2E;
+ void *sp28;
+ void *sp24;
+ s32 sp20;
+ s32 sp18;
+ f64 temp_f0;
+ f64 temp_f0_2;
+ f64 temp_f0_3;
+ f64 temp_f0_4;
+ f64 temp_f0_5;
+ s32 temp_a1;
+ s32 temp_t4;
+ s32 temp_v0_5;
+ s8 temp_a1_2;
+ s8 temp_a1_3;
+ s8 temp_a1_4;
+ s8 temp_v0;
+ s8 temp_v0_10;
+ s8 temp_v0_2;
+ s8 temp_v0_3;
+ s8 temp_v0_4;
+ s8 temp_v0_6;
+ s8 temp_v0_7;
+ s8 temp_v0_8;
+ s8 temp_v0_9;
+ u16 temp_t8;
+ void *temp_a2;
+ void *temp_a2_2;
+ u16 phi_v1;
+ s8 phi_a1;
+ s32 phi_a3;
+ s8 *phi_v1_2;
+ s32 phi_a3_2;
+ void *phi_a2;
+ s8 *phi_v1_3;
+
+ temp_t8 = (arg0->unk6 | arg0->unkC) & 0xFFFF;
+ phi_v1 = temp_t8;
+ if ((gEnableDebugMode == 0) && ((temp_t8 & 0x1000) != 0)) {
+ phi_v1 = (temp_t8 | 0x8000) & 0xFFFF;
+ }
+ sp2E = phi_v1;
+ if (func_800B4520() == 0) {
+ temp_v0 = D_8018EDEC;
+ if (temp_v0 != 0xB) {
+ if (temp_v0 != 0xC) {
+ if (temp_v0 != 0xD) {
+ return;
+ }
+ if ((phi_v1 & 0xD000) != 0) {
+ D_8018EDEC = 0xB;
+ }
+ // Duplicate return node #76. Try simplifying control flow for better match
+ return;
+ }
+ sp18 = phi_v1;
+ temp_a2 = func_800AAEF4(0xE9, 0xB);
+ if ((sp18 & 0x800) != 0) {
+ temp_v0_2 = D_8018EDF9;
+ if (temp_v0_2 > 0) {
+ D_8018EDF9 = temp_v0_2 - 1;
+ sp28 = temp_a2;
+ sp18 = sp18;
+ play_sound2(0x49008000);
+ temp_f0 = temp_a2->unk24;
+ if (temp_f0 < D_800F2DA8) {
+ temp_a2->unk24 = temp_f0 + 4.0;
+ }
+ temp_a2->unk8 = -1;
+ }
+ }
+ if ((sp18 & 0x400) != 0) {
+ temp_v0_3 = D_8018EDF9;
+ if (temp_v0_3 <= 0) {
+ D_8018EDF9 = temp_v0_3 + 1;
+ sp28 = temp_a2;
+ sp18 = sp18;
+ play_sound2(0x49008000);
+ temp_f0_2 = temp_a2->unk24;
+ if (temp_f0_2 < D_800F2DB0) {
+ temp_a2->unk24 = temp_f0_2 + 4.0;
+ }
+ temp_a2->unk8 = 1;
+ }
+ }
+ if ((sp18 & 0x4000) != 0) {
+ D_8018EDEC = 0xB;
+ play_sound2(0x49008002);
+ return;
+ }
+ if ((sp18 & 0x8000) != 0) {
+ if (D_8018EDF9 != 0) {
+ temp_v0_4 = D_8018EDF8;
+ phi_a1 = 0;
+ if (temp_v0_4 != 1) {
+ if (temp_v0_4 != 2) {
+
+ } else {
+ temp_v0_5 = func_800B639C(D_8018EDF7, 0, temp_a2, sp18);
+ phi_a1 = temp_v0_5;
+ if (temp_v0_5 >= 0) {
+ sp20 = temp_v0_5;
+ temp_a1 = sp20;
+ if (func_800B69BC(temp_v0_5, temp_v0_5) != 0) {
+ D_8018EDEC = 0xD;
+ sp20 = temp_a1;
+ play_sound2(0x4900FF07, temp_a1);
+ phi_a1 = temp_a1;
+ } else {
+ sp20 = temp_a1;
+ play_sound2(0x4900801D, temp_a1);
+ D_8018EDEC = 0xB;
+ phi_a1 = temp_a1;
+ }
+ }
+ }
+ } else {
+ func_800B4728(D_8018EDF7, 0, temp_a2, sp18);
+ func_800B559C(D_8018EDF7);
+ play_sound2(0x4900801D);
+ phi_a1 = -1;
+ }
+ if ((phi_a1 + 1) == 0) {
+ D_8018EDEC = 0xB;
+ return;
+ }
+ // Duplicate return node #76. Try simplifying control flow for better match
+ return;
+ }
+ play_sound2(0x49008002);
+ D_8018EDEC = 0xB;
+ return;
+ }
+ // Duplicate return node #76. Try simplifying control flow for better match
+ return;
+ }
+ phi_a3 = phi_v1;
+ if ((phi_v1 & 0x200) != 0) {
+ temp_a1_2 = D_8018EDF7;
+ if (temp_a1_2 > 0) {
+ D_8018EDF7 = temp_a1_2 - 1;
+ sp18 = phi_v1;
+ play_sound2(0x49008000, temp_a1_2);
+ phi_a3 = sp18;
+ }
+ }
+ if ((phi_a3 & 0x100) != 0) {
+ temp_a1_3 = D_8018EDF7;
+ if (temp_a1_3 < 0xF) {
+ D_8018EDF7 = temp_a1_3 + 1;
+ sp18 = phi_a3;
+ play_sound2(0x49008000, temp_a1_3);
+ }
+ }
+ sp18 = phi_a3;
+ temp_a1_4 = D_8018EDF7;
+ temp_a2_2 = func_800AAEF4(0xE8);
+ temp_t4 = ((temp_a1_4 / 4) * 0x60) + ((temp_a1_4 % 4) * 0x18);
+ if (D_8018EDF8 == 2) {
+ sp28 = temp_a2_2;
+ sp18 = phi_a3;
+ sp24 = temp_t4 + &D_8018EB90;
+ if (func_800B639C(temp_a1_4, temp_a1_4, temp_a2_2, phi_a3) < 0) {
+ D_8018EDF8 = D_8018EDF8 - 1;
+ }
+ }
+ temp_v0_6 = D_8018EDF8;
+ phi_v1_2 = &D_8018EDF8;
+ if ((temp_v0_6 == 1) && ((temp_t4 + &D_8018EB90)->unk12 == 0)) {
+ D_8018EDF8 = temp_v0_6 - 1;
+ }
+ if ((phi_a3 & 0x800) != 0) {
+ temp_v0_7 = D_8018EDF8;
+ if (temp_v0_7 > 0) {
+ D_8018EDF8 = temp_v0_7 - 1;
+ temp_v0_8 = D_8018EDF8;
+ if ((temp_v0_8 == 1) && ((temp_t4 + &D_8018EB90)->unk12 == 0)) {
+ D_8018EDF8 = temp_v0_8 - 1;
+ }
+ sp28 = temp_a2_2;
+ sp18 = phi_a3;
+ sp24 = temp_t4 + &D_8018EB90;
+ play_sound2(0x49008000);
+ temp_f0_3 = temp_a2_2->unk24;
+ phi_v1_2 = &D_8018EDF8;
+ if (temp_f0_3 < D_800F2D90) {
+ temp_a2_2->unk24 = temp_f0_3 + 4.0;
+ }
+ temp_a2_2->unk8 = -1;
+ }
+ }
+ phi_a3_2 = phi_a3;
+ phi_a2 = temp_a2_2;
+ phi_v1_3 = phi_v1_2;
+ if ((phi_a3 & 0x400) != 0) {
+ temp_v0_9 = *phi_v1_2;
+ if (temp_v0_9 < 2) {
+ *phi_v1_2 = temp_v0_9 + 1;
+ temp_v0_10 = *phi_v1_2;
+ if ((temp_v0_10 == 1) && ((temp_t4 + &D_8018EB90)->unk12 == 0)) {
+ *phi_v1_2 = temp_v0_10 + 1;
+ }
+ if ((*phi_v1_2 == 2) && (sp28 = temp_a2_2, sp18 = phi_a3, sp24 = temp_t4 + &D_8018EB90, phi_a3_2 = phi_a3, phi_a2 = temp_a2_2, phi_v1_3 = &D_8018EDF8, (func_800B639C(D_8018EDF7) < 0))) {
+ if ((temp_t4 + &D_8018EB90)->unk12 == 0) {
+ D_8018EDF8 = 0;
+ } else {
+ D_8018EDF8 = 1;
+ }
+ } else {
+ sp28 = temp_a2_2;
+ sp18 = phi_a3;
+ play_sound2(0x49008000);
+ temp_f0_4 = temp_a2_2->unk24;
+ phi_a3_2 = phi_a3;
+ phi_a2 = temp_a2_2;
+ phi_v1_3 = &D_8018EDF8;
+ if (temp_f0_4 < D_800F2D98) {
+ temp_a2_2->unk24 = temp_f0_4 + 4.0;
+ }
+ temp_a2_2->unk8 = 1;
+ }
+ }
+ }
+ if ((phi_a3_2 & 0x4000) != 0) {
+ func_8009E208();
+ play_sound2(0x49008002);
+ return;
+ }
+ if ((phi_a3_2 & 0x8000) != 0) {
+ temp_f0_5 = phi_a2->unk24;
+ if (temp_f0_5 < D_800F2DA0) {
+ phi_a2->unk24 = temp_f0_5 + 4.0;
+ }
+ if (*phi_v1_3 == 0) {
+ func_8009E208(0x49008001);
+ play_sound2(0x49008002);
+ return;
+ }
+ D_8018EDEC = 0xC;
+ D_8018EDF9 = 0;
+ play_sound2(0x49008001);
+ return;
+ }
+ // Duplicate return node #76. Try simplifying control flow for better match
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B15AC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_8009E1E4(); // extern
+s32 func_800B4520(); // extern
+? func_800CA388(?); // extern
+
+void func_800B1C40(void *arg0, ? arg1) {
+ u16 sp1E;
+
+ sp1E = arg0->unk6 | arg0->unkC;
+ if ((func_800B4520() == 0) && (sp1E != 0)) {
+ func_800CA388(0x3C);
+ func_8009E1E4();
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B1C40.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B1C90:
+
+Unable to determine jump table for jr instruction at func_800B1C90.s line 22.
+
+There must be a read of a variable in the same block as
+the instruction, which has a name starting with "jtbl"/"jpt_".
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B1C90.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B20F4:
+
+Unable to determine jump table for jr instruction at func_800B20F4.s line 34.
+
+There must be a read of a variable in the same block as
+the instruction, which has a name starting with "jtbl"/"jpt_".
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B20F4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern s16 D_800DC648;
+extern ? D_800E86AB;
+extern ? D_800E86AD;
+extern ? D_800F2B70;
+
+void func_800B28C8(void) {
+ s32 temp_a1;
+ s8 temp_a0;
+ s8 temp_v0;
+ s8 temp_v1;
+
+ temp_v1 = D_8018EDF3;
+ temp_a0 = *(&D_800E86AB + temp_v1);
+ temp_a1 = *(&D_800F2B70 + ((temp_v1 * 0xC) + (temp_a0 * 4)));
+ temp_v0 = *(&D_800E86AD + ((temp_v1 * 3) + temp_a0));
+ if (temp_a1 != 0) {
+ if (temp_a1 != 1) {
+ if (temp_a1 != 2) {
+ if (temp_a1 != 3) {
+ return;
+ }
+ D_800DC648 = 1;
+ gIsMirrorMode = 0;
+ return;
+ }
+ D_800DC548 = temp_v0;
+ D_800DC648 = 1;
+ if (temp_v0 == 3) {
+ gIsMirrorMode = 1;
+ return;
+ }
+ gIsMirrorMode = 0;
+ return;
+ }
+ D_800DC548 = 1;
+ gIsMirrorMode = 0;
+ D_800DC648 = 0;
+ if (temp_v0 != 0) {
+
+ }
+ return;
+ }
+ D_800DC548 = temp_v0;
+ D_800DC648 = 1;
+ if (temp_v0 == 3) {
+ gIsMirrorMode = 1;
+ return;
+ }
+ gIsMirrorMode = 0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B28C8.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B29D8:
+
+Unable to determine jump table for jr instruction at func_800B29D8.s line 39.
+
+There must be a read of a variable in the same block as
+the instruction, which has a name starting with "jtbl"/"jpt_".
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B29D8.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern s8 D_8018EDE5;
+extern s8 D_8018EDE6;
+extern s8 D_8018EDE7;
+extern s8 gCharacterSelections;
+
+? func_800B34E8(s32 arg0) {
+ if (arg0 == gCharacterSelections) {
+ return 0;
+ }
+ if (arg0 == D_8018EDE5) {
+ return 0;
+ }
+ if (arg0 == D_8018EDE6) {
+ return 0;
+ }
+ if (arg0 == D_8018EDE7) {
+ return 0;
+ }
+ return 1;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B34E8.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B3554:
+
+Label L800B3A94 refers to a delay slot; this is currently not supported.
+Please modify the assembly to work around it (e.g. copy the instruction
+to all jump sources and move the label, or add a nop to the delay slot).
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B3554.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_8009E1C0(); // extern
+? func_8009E208(); // extern
+? func_800B44AC(s8 *, s8 *, u16); // extern
+s32 func_800B4520(u16); // extern
+? func_800CA330(?); // extern
+? play_sound2(?, s8 *, u16); // extern
+extern s32 D_800DC540;
+extern s8 D_8018EDEC;
+extern s32 D_8018EE00;
+extern s8 D_8018EE0A;
+extern s8 gCupSelection;
+extern ? gCupTrackOrder;
+
+void func_800B3B58(void *arg0, u16 arg1) {
+ u16 sp26;
+ s32 sp1C;
+ s32 temp_t5;
+ s32 temp_v0_2;
+ s8 temp_v0;
+ s8 temp_v0_3;
+ s8 temp_v0_4;
+ s8 temp_v0_5;
+ s8 temp_v0_6;
+ u16 temp_t8;
+ u16 phi_a2;
+ s32 phi_v1;
+ s8 phi_v0;
+ s8 *phi_a1;
+ s32 phi_v1_2;
+ s32 phi_v0_2;
+ s8 *phi_a1_2;
+
+ temp_t8 = (arg0->unk6 | arg0->unkC) & 0xFFFF;
+ phi_a2 = temp_t8;
+ if ((gEnableDebugMode == 0) && ((temp_t8 & 0x1000) != 0)) {
+ phi_a2 = (temp_t8 | 0x8000) & 0xFFFF;
+ }
+ sp26 = phi_a2;
+ if (func_800B4520(phi_a2) == 0) {
+ temp_v0 = D_8018EDEC;
+ if (temp_v0 != 1) {
+ if (temp_v0 != 2) {
+ if (temp_v0 != 3) {
+ if (temp_v0 != 4) {
+ return;
+ }
+ goto block_22;
+ }
+ if ((arg1 == 0) && ((temp_t5 = D_8018EE00 + 1, D_8018EE00 = temp_t5, (temp_t5 == 0x3C)) || ((temp_t5 % 0x12C) == 0))) {
+ sp1C = phi_a2;
+ play_sound2(0x4900900F, &D_8018EDEC, phi_a2);
+ }
+ if ((phi_a2 & 0x4000) != 0) {
+ temp_v0_2 = gModeSelection;
+ if (temp_v0_2 != 0) {
+ if (temp_v0_2 != 3) {
+ D_8018EDEC = 2;
+ } else {
+ D_8018EDEC = 4;
+ }
+ } else {
+ D_8018EDEC = 1;
+ }
+ func_800B44AC();
+ play_sound2(0x49008002);
+ return;
+ }
+ if ((phi_a2 & 0x8000) != 0) {
+ func_8009E1C0();
+ func_800CA330(0x19);
+ play_sound2(0x49008016);
+ }
+ // Duplicate return node #48. Try simplifying control flow for better match
+ return;
+ }
+block_22:
+ phi_v1 = phi_a2;
+ if ((phi_a2 & 0x400) != 0) {
+ temp_v0_3 = gCourseSelection;
+ if (temp_v0_3 < 3) {
+ gCourseSelection = temp_v0_3 + 1;
+ sp1C = phi_a2;
+ func_800B44AC(&gCourseSelection, &D_8018EDEC, phi_a2);
+ play_sound2(0x49008000);
+ phi_v1 = sp1C;
+ }
+ }
+ temp_v0_4 = gCourseSelection;
+ phi_v0 = temp_v0_4;
+ phi_a1 = &D_8018EDEC;
+ if (((phi_v1 & 0x800) != 0) && (temp_v0_4 > 0)) {
+ gCourseSelection = temp_v0_4 - 1;
+ sp1C = phi_v1;
+ func_800B44AC(&gCourseSelection, &D_8018EDEC);
+ play_sound2(0x49008000);
+ phi_v0 = gCourseSelection;
+ phi_a1 = &D_8018EDEC;
+ }
+ gCurrentCourseId = *(&gCupTrackOrder + ((gCupSelection * 8) + (phi_v0 * 2)));
+ if ((phi_v1 & 0x4000) != 0) {
+ if (*phi_a1 == 2) {
+ *phi_a1 = 1;
+ } else {
+ func_8009E208();
+ }
+ func_800B44AC();
+ play_sound2(0x49008002);
+ return;
+ }
+ if ((phi_v1 & 0x8000) != 0) {
+ *phi_a1 = 3;
+ play_sound2(0x49008001, phi_a1);
+ func_800B44AC();
+ D_8018EE00 = 0;
+ return;
+ }
+ // Duplicate return node #48. Try simplifying control flow for better match
+ return;
+ }
+ phi_v1_2 = phi_a2;
+ if ((phi_a2 & 0x100) != 0) {
+ temp_v0_5 = gCupSelection;
+ if (temp_v0_5 < 3) {
+ D_8018EE0A = temp_v0_5;
+ gCupSelection = temp_v0_5 + 1;
+ sp1C = phi_a2;
+ func_800B44AC();
+ play_sound2(0x49008000);
+ phi_v1_2 = sp1C;
+ }
+ }
+ temp_v0_6 = gCupSelection;
+ phi_v0_2 = temp_v0_6;
+ phi_a1_2 = &D_8018EDEC;
+ if (((phi_v1_2 & 0x200) != 0) && (temp_v0_6 > 0)) {
+ D_8018EE0A = temp_v0_6;
+ gCupSelection = temp_v0_6 - 1;
+ sp1C = phi_v1_2;
+ func_800B44AC();
+ play_sound2(0x49008000);
+ phi_v0_2 = gCupSelection;
+ phi_a1_2 = &D_8018EDEC;
+ }
+ D_800DC540 = phi_v0_2;
+ gCurrentCourseId = *(&gCupTrackOrder + ((phi_v0_2 * 8) + (gCourseSelection * 2)));
+ if ((phi_v1_2 & 0x4000) != 0) {
+ func_8009E208();
+ play_sound2(0x49008002);
+ return;
+ }
+ if ((phi_v1_2 & 0x8000) != 0) {
+ if (gModeSelection != 0) {
+ *phi_a1_2 = 2;
+ play_sound2(0x49008001, phi_a1_2);
+ } else {
+ *phi_a1_2 = 3;
+ play_sound2(0x49008001, phi_a1_2);
+ gCurrentCourseId = *(&gCupTrackOrder + (gCupSelection * 8));
+ D_8018EE00 = 0;
+ }
+ func_800B44AC();
+ return;
+ }
+ // Duplicate return node #48. Try simplifying control flow for better match
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B3B58.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+/*
+Failed to decompile function func_800B3F74:
+
+Unable to determine jump table for jr instruction at func_800B3F74.s line 40.
+
+There must be a read of a variable in the same block as
+the instruction, which has a name starting with "jtbl"/"jpt_".
+*/
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B3F74.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern s32 D_8018E7A8;
+
+void func_800B44AC(void) {
+ D_8018E7A8 = 0x20;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B44AC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800C3448(s32, s32 *); // extern
+extern s32 D_800F2BE4;
+extern u8 D_8018EDF2;
+
+void func_800B44BC(void) {
+ s32 sp20;
+ u8 temp_v1;
+
+ sp20 = D_800F2BE4;
+ temp_v1 = D_8018EDF2;
+ if ((temp_v1 == 0) || (temp_v1 == 1) || (temp_v1 == 3)) {
+ func_800C3448(*(&sp20 + temp_v1) | 0xE0000000, &sp20);
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B44BC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern s8 D_8018E7B0;
+
+? func_800B4520(void) {
+ s8 temp_v0;
+
+ temp_v0 = D_8018E7B0;
+ if ((temp_v0 == 2) || (temp_v0 == 3) || (temp_v0 == 4) || (temp_v0 == 7)) {
+ return 1;
+ }
+ return 0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4520.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s8 func_800B4874(); // extern
+extern ? D_8018EB90;
+extern OSMesgQueue gSIEventMesgQueue;
+
+void func_800B45E0(s32 arg0) {
+ u8 *temp_a2;
+
+ temp_a2 = &D_8018EB90 + ((arg0 / 4) * 0x60) + ((arg0 % 4) * 0x18);
+ temp_a2->unk17 = func_800B4874();
+ osEepromLongWrite(&gSIEventMesgQueue, ((temp_a2 - &D_8018EB90) >> 3) & 0xFF, temp_a2, 0x18);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B45E0.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s8 func_800B492C(); // extern
+s8 func_800B49E4(); // extern
+extern ? D_8018EB90;
+extern u8 D_8018ED10;
+extern s8 D_8018ED16;
+extern s8 D_8018ED17;
+extern OSMesgQueue gSIEventMesgQueue;
+
+void func_800B4670(void) {
+ D_8018ED16 = func_800B492C();
+ D_8018ED17 = func_800B49E4();
+ osEepromLongWrite(&gSIEventMesgQueue, ((&D_8018ED10 - &D_8018EB90) >> 3) & 0xFF, &D_8018ED10, 8);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4670.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4728(s32); // extern
+? func_800B4820(); // extern
+? func_800B559C(s32); // extern
+? func_800B5948(); // extern
+
+void func_800B46D0(void) {
+ s32 temp_s0;
+ s32 phi_s0;
+
+ phi_s0 = 0;
+ do {
+ func_800B4728(phi_s0);
+ func_800B559C(phi_s0);
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ } while (temp_s0 != 0x10);
+ func_800B4820();
+ func_800B5948();
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B46D0.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B45E0(s32); // extern
+s8 func_800B4874(s32, s32, s32, void *); // extern
+extern u8 D_800F2E60;
+extern ? D_8018EB90;
+
+void func_800B4728(s32 arg0) {
+ void *sp18;
+ s32 temp_a2;
+ s32 temp_a2_2;
+ s32 temp_v0;
+ void *temp_a3;
+ u8 *phi_v1;
+ s32 phi_a2;
+ s32 phi_v0;
+ u8 *phi_v0_2;
+ s32 phi_a2_2;
+
+ temp_a3 = ((arg0 / 4) * 0x60) + ((arg0 % 4) * 0x18) + &D_8018EB90;
+ phi_a2 = 0;
+ phi_a2_2 = 0;
+ do {
+ phi_v1 = &D_800F2E60;
+ phi_v0 = 0;
+loop_2:
+ temp_v0 = phi_v0 + 1;
+ *(temp_a3 + (phi_a2 * 3) + phi_v0) = *phi_v1;
+ phi_v1 += 1;
+ phi_v0 = temp_v0;
+ if (temp_v0 != 3) {
+ goto loop_2;
+ }
+ temp_a2 = phi_a2 + 1;
+ phi_a2 = temp_a2;
+ } while (temp_a2 < 5);
+ phi_v0_2 = &D_800F2E60;
+ do {
+ temp_a2_2 = phi_a2_2 + 1;
+ (temp_a3 + phi_a2_2)->unkF = *phi_v0_2;
+ phi_v0_2 += 1;
+ phi_a2_2 = temp_a2_2;
+ } while (temp_a2_2 != 3);
+ temp_a3->unk12 = 0;
+ sp18 = temp_a3;
+ temp_a3->unk17 = func_800B4874(arg0, 3, temp_a2_2, temp_a3);
+ func_800B45E0(arg0);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4728.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B44BC(); // extern
+? func_800B4670(); // extern
+extern s8 D_8018ED10;
+extern s8 D_8018ED11;
+extern s8 D_8018ED12;
+extern s8 D_8018ED13;
+extern s8 D_8018ED14;
+extern s8 D_8018EDF2;
+
+void func_800B4820(void) {
+ D_8018ED10 = 0;
+ D_8018ED11 = 0;
+ D_8018ED12 = 0;
+ D_8018ED13 = 0;
+ D_8018ED14 = 0;
+ D_8018EDF2 = 0;
+ func_800B44BC();
+ func_800B4670();
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4820.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018EB90;
+
+s32 func_800B4874(s32 arg0) {
+ s32 temp_a1;
+ s32 temp_a3;
+ s32 temp_v1;
+ s32 phi_a0;
+ s32 phi_a1;
+ s32 phi_v1;
+ s32 phi_a2;
+
+ phi_a1 = 0;
+ phi_a2 = 0;
+ phi_v1 = 0;
+ do {
+ phi_a0 = 0;
+loop_2:
+ temp_a3 = phi_a0 + 1;
+ temp_v1 = phi_v1 + (*(((arg0 / 4) * 0x60) + ((arg0 % 4) * 0x18) + &D_8018EB90 + phi_a2 + phi_a0) * temp_a3) + phi_a1;
+ phi_a0 = temp_a3;
+ phi_v1 = temp_v1;
+ phi_v1 = temp_v1;
+ if (temp_a3 != 3) {
+ goto loop_2;
+ }
+ temp_a1 = phi_a1 + 1;
+ phi_a1 = temp_a1;
+ phi_a2 += 3;
+ } while (temp_a1 != 7);
+ return (temp_v1 % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4874.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern u8 D_8018ED10;
+
+s32 func_800B492C(void) {
+ void *temp_a0;
+
+ temp_a0 = &D_8018ED10 + 1;
+ return ((D_8018ED10 + 1 + ((temp_a0->unk0 + 1) * 2) + 1 + ((temp_a0->unk1 + 1) * 3) + 1 + 1 + ((temp_a0->unk2 + 1) * 4) + 1 + 2 + ((temp_a0->unk3 + 1) * 5) + 1 + 3) % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B492C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern u8 D_8018ED16;
+
+s32 func_800B49E4(void) {
+ return ((D_8018ED16 + 0x5A) % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B49E4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4A9C(s32); // extern
+? func_800B4CB4(); // extern
+extern u8 D_8018EB90;
+extern u8 D_8018ED14;
+extern u8 D_8018EDF2;
+extern OSMesgQueue gSIEventMesgQueue;
+
+void func_800B4A10(void) {
+ s32 temp_s0;
+ u8 temp_t6;
+ s32 phi_s0;
+
+ osEepromLongRead(&gSIEventMesgQueue, 0, &D_8018EB90, 0x200);
+ phi_s0 = 0;
+ do {
+ func_800B4A9C(phi_s0);
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ } while (temp_s0 != 0x10);
+ func_800B4CB4();
+ temp_t6 = D_8018ED14;
+ D_8018EDF2 = temp_t6;
+ if ((temp_t6 & 0xFF) >= 4) {
+ D_8018EDF2 = 3;
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4A10.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B45E0(s32, u8 *, u8, s32); // extern
+? func_800B4728(s32); // extern
+s32 func_800B4874(s32); // extern
+s32 func_800B4EB4(?, s32); // extern
+? func_800B4FB0(s32); // extern
+? func_800B559C(s32); // extern
+s32 func_800B58C4(s32); // extern
+extern u8 D_800F2E60;
+extern ? D_8018EB90;
+extern ? D_8018EBA2;
+
+void func_800B4A9C(s32 arg0) {
+ void *sp24;
+ s32 temp_v1;
+ u8 *temp_a1;
+ u8 temp_a2;
+ u8 temp_t6;
+ u8 temp_t8;
+ void *temp_a0;
+ void *temp_t2;
+ void *temp_v0;
+ s32 phi_v1;
+ u8 *phi_a1;
+ s32 phi_a3;
+ s32 phi_a3_2;
+
+ if ((func_800B4EB4(0, arg0) & 0xFFFFF) < 0x927C0) {
+ *(&D_8018EBA2 + (((arg0 / 4) * 0x60) + ((arg0 % 4) * 0x18))) = 1;
+ }
+ temp_t2 = ((arg0 / 4) * 0x60) + ((arg0 % 4) * 0x18) + &D_8018EB90;
+ sp24 = temp_t2;
+ func_800B4FB0(arg0);
+ sp24 = temp_t2;
+ if (temp_t2->unk17 != func_800B4874(arg0)) {
+ sp24 = temp_t2;
+ func_800B4728(arg0);
+ if (func_800B58C4(arg0) == 0) {
+ phi_v1 = 0;
+ phi_a1 = &D_800F2E60;
+ phi_a3_2 = 0;
+ do {
+ temp_v0 = ((arg0 / 8) * 0x38) + ((arg0 % 8) * 3) + 0x188 + &D_8018EB90 + phi_v1;
+ temp_t6 = temp_v0->unk0;
+ temp_a0 = temp_t2 + phi_v1;
+ temp_v1 = phi_v1 + 1;
+ temp_a0->unk0 = temp_t6;
+ temp_t8 = temp_v0->unk18;
+ temp_a0->unkF = temp_t8;
+ temp_a2 = *phi_a1;
+ phi_v1 = temp_v1;
+ phi_a3 = phi_a3_2;
+ if (((temp_t6 & 0xFF) == temp_a2) && ((temp_t8 & 0xFF) == temp_a2)) {
+ phi_a3 = phi_a3_2 + 1;
+ }
+ temp_a1 = phi_a1 + 1;
+ phi_a1 = temp_a1;
+ phi_a3_2 = phi_a3;
+ } while (temp_v1 != 3);
+ if (phi_a3 == 3) {
+ temp_t2->unk12 = 0;
+ } else {
+ temp_t2->unk12 = 1;
+ }
+ func_800B45E0(arg0, temp_a1, temp_a2, phi_a3);
+ }
+ func_800B559C(arg0);
+ return;
+ }
+ if (func_800B58C4(arg0) != 0) {
+ func_800B559C(arg0);
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4A9C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4820(); // extern
+s32 func_800B492C(); // extern
+s32 func_800B49E4(); // extern
+? func_800B5948(); // extern
+u8 func_800B59F4(); // extern
+u8 func_800B5AAC(); // extern
+s32 func_800B5AD8(); // extern
+extern ? D_8018EB90;
+extern u8 D_8018ED10;
+extern u8 D_8018ED11;
+extern u8 D_8018ED12;
+extern u8 D_8018ED13;
+extern u8 D_8018ED14;
+extern u8 D_8018ED16;
+extern u8 D_8018ED17;
+extern u8 D_8018ED88;
+extern u8 D_8018ED89;
+extern u8 D_8018ED8A;
+extern u8 D_8018ED8B;
+extern u8 D_8018ED8C;
+extern OSMesgQueue gSIEventMesgQueue;
+
+void func_800B4CB4(void) {
+ if ((D_8018ED16 != func_800B492C()) || (D_8018ED17 != func_800B49E4())) {
+ func_800B4820();
+ if (func_800B5AD8() == 0) {
+ D_8018ED10 = D_8018ED88;
+ D_8018ED11 = D_8018ED89;
+ D_8018ED12 = D_8018ED8A;
+ D_8018ED13 = D_8018ED8B;
+ D_8018ED14 = D_8018ED8C;
+ D_8018ED16 = func_800B59F4();
+ D_8018ED17 = func_800B5AAC();
+ osEepromLongWrite(&gSIEventMesgQueue, ((&D_8018ED10 - &D_8018EB90) >> 3) & 0xFF, &D_8018ED10, 8);
+ }
+ func_800B5948();
+ return;
+ }
+ if (func_800B5AD8() != 0) {
+ func_800B5948();
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4CB4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+void func_800B4DCC(void *arg0, u32 arg1, s32 arg2) {
+ u32 temp_t8;
+
+ temp_t8 = arg1 >> 8;
+ arg0->unk0 = arg1;
+ arg0->unk1 = temp_t8;
+ arg0->unk2 = ((temp_t8 >> 8) & 0xF) + ((arg2 & 7) * 0x10);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4DCC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B4DF4(void *arg0) {
+ return ((arg0->unk1 << 8) + arg0->unk0 + (arg0->unk2 << 0x10)) & 0xFFFFFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4DF4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4DF4(void *, s32); // extern
+extern ? D_8018EB90;
+extern s8 gCupSelection;
+
+void func_800B4E24(s32 arg0) {
+ s32 temp_v0;
+
+ temp_v0 = (gCupSelection * 4) + gCourseSelection;
+ func_800B4DF4(((temp_v0 / 4) * 0x60) + ((temp_v0 % 4) * 0x18) + (arg0 * 3) + &D_8018EB90, arg0);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4E24.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4DF4(void *, s32); // extern
+extern ? D_8018EB90;
+
+void func_800B4EB4(s32 arg0, s32 arg1) {
+ func_800B4DF4(((arg1 / 4) * 0x60) + ((arg1 % 4) * 0x18) + (arg0 * 3) + &D_8018EB90, arg0);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4EB4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4DF4(void *); // extern
+extern ? D_8018EB90;
+extern s8 gCupSelection;
+
+void func_800B4F2C(void) {
+ s32 temp_v0;
+
+ temp_v0 = (gCupSelection * 4) + gCourseSelection;
+ func_800B4DF4(((temp_v0 / 4) * 0x60) + ((temp_v0 % 4) * 0x18) + 0xF + &D_8018EB90);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4F2C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4DF4(void *, s32); // extern
+extern ? D_8018EB90;
+
+void func_800B4FB0(s32 arg0) {
+ func_800B4DF4(((arg0 / 4) * 0x60) + ((arg0 % 4) * 0x18) + 0xF + &D_8018EB90, arg0);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B4FB0.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B45E0(s32); // extern
+? func_800B4DCC(void *, u32, s32, void *); // extern
+s32 func_800B4DF4(void *); // extern
+extern ? D_8018EB90;
+extern s8 gCupSelection;
+
+s32 func_800B5020(u32 arg0, s32 arg1) {
+ s32 sp30;
+ s32 temp_a0;
+ s32 temp_s0;
+ s32 temp_s1;
+ s32 temp_v0;
+ s32 temp_v0_2;
+ s32 temp_v1;
+ u8 temp_t3;
+ u8 temp_t8;
+ u8 temp_t9;
+ void *temp_a3;
+ void *temp_s2;
+ void *temp_v0_3;
+ void *temp_v0_4;
+ s32 phi_s0;
+ s32 phi_s1;
+ s32 phi_s1_2;
+ s32 phi_v1;
+ s32 phi_a0;
+ s32 phi_v1_2;
+ s32 phi_s0_2;
+ s32 phi_a0_2;
+
+ temp_v0 = (gCupSelection * 4) + gCourseSelection;
+ temp_s2 = ((temp_v0 / 4) * 0x60) + ((temp_v0 % 4) * 0x18) + &D_8018EB90;
+ sp30 = temp_v0;
+ phi_s0 = 0;
+ phi_s1 = 0;
+loop_1:
+ phi_s1_2 = phi_s1;
+ phi_s0_2 = phi_s0;
+ if (arg0 >= (func_800B4DF4(temp_s2 + phi_s0) & 0xFFFFF)) {
+ temp_s1 = phi_s1 + 1;
+ temp_s0 = phi_s0 + 3;
+ phi_s0 = temp_s0;
+ phi_s1 = temp_s1;
+ phi_s1_2 = temp_s1;
+ phi_s0_2 = temp_s0;
+ if (temp_s1 != 5) {
+ goto loop_1;
+ }
+ }
+ phi_a0 = 4;
+ phi_a0_2 = 4;
+ if (phi_s1_2 >= 5) {
+ return -1;
+ }
+ temp_a3 = temp_s2 + phi_s0_2;
+ if (phi_s1_2 < 4) {
+ temp_v0_2 = -((4 - phi_s1_2) & 3);
+ if (temp_v0_2 != 0) {
+ phi_v1 = 4 * 3;
+ do {
+ temp_v0_3 = temp_s2 + phi_v1;
+ temp_a0 = phi_a0 - 1;
+ temp_v0_3->unk0 = temp_v0_3->unk-3;
+ temp_v0_3->unk1 = temp_v0_3->unk-2;
+ temp_v0_3->unk2 = temp_v0_3->unk-1;
+ phi_v1 += -3;
+ phi_a0 = temp_a0;
+ phi_a0_2 = temp_a0;
+ } while ((temp_v0_2 + 4) != temp_a0);
+ if (phi_s1_2 != temp_a0) {
+ goto block_10;
+ }
+ } else {
+block_10:
+ phi_v1_2 = phi_a0_2 * 3;
+ do {
+ temp_v0_4 = temp_s2 + phi_v1_2;
+ temp_v0_4->unk0 = temp_v0_4->unk-3;
+ temp_v0_4->unk1 = temp_v0_4->unk-2;
+ temp_t8 = temp_v0_4->unk-8;
+ temp_t9 = temp_v0_4->unk-7;
+ temp_t3 = temp_v0_4->unk-1;
+ temp_v1 = phi_v1_2 - 0xC;
+ temp_v0_4->unk-3 = temp_v0_4->unk-6;
+ temp_v0_4->unk-7 = temp_v0_4->unk-A;
+ temp_v0_4->unk-8 = temp_v0_4->unk-B;
+ temp_v0_4->unk-2 = temp_v0_4->unk-5;
+ temp_v0_4->unk-1 = temp_v0_4->unk-4;
+ temp_v0_4->unk-6 = temp_v0_4->unk-9;
+ temp_v0_4->unk-5 = temp_t8;
+ temp_v0_4->unk-4 = temp_t9;
+ temp_v0_4->unk-9 = temp_v0_4->unk-C;
+ temp_v0_4->unk2 = temp_t3;
+ phi_v1_2 = temp_v1;
+ } while ((phi_s1_2 * 3) != temp_v1);
+ }
+ }
+ func_800B4DCC(temp_a3, arg0, arg1, temp_a3);
+ temp_s2->unk12 = 1;
+ func_800B45E0(sp30);
+ return phi_s1_2;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5020.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B45E0(s32); // extern
+? func_800B4DCC(void *, u32, s32, s32); // extern
+s32 func_800B4F2C(s32, ? *, ? *, s32); // extern
+extern ? D_8018CA70;
+extern ? D_8018CA74;
+extern ? D_8018EB90;
+extern s8 gCupSelection;
+
+s32 func_800B5218(void) {
+ s32 sp38;
+ s32 sp28;
+ s32 sp24;
+ void *sp20;
+ ? *sp18;
+ ? *temp_a1;
+ s32 temp_a0;
+ s32 temp_v0;
+ s32 temp_v1;
+ u32 temp_a1_2;
+ void *temp_v0_2;
+ ? *phi_a1;
+ ? *phi_a2;
+ s32 phi_v0;
+ ? *phi_a2_2;
+ s32 phi_a3;
+ s32 phi_v0_2;
+ s32 phi_a3_2;
+
+ sp38 = (gCupSelection * 4) + gCourseSelection;
+ sp28 = *D_800E86A8;
+ phi_a1 = &D_8018CA74;
+ phi_a2 = &D_8018CA70;
+ phi_v0 = 1;
+ phi_a3_2 = 1;
+ do {
+ temp_v1 = phi_a1->unk20;
+ temp_a0 = phi_a2->unk20;
+ phi_a2_2 = phi_a2;
+ phi_a3 = phi_a3_2;
+ if (temp_v1 < temp_a0) {
+ phi_a2_2 = (phi_v0 * 4) + &D_8018CA70;
+ phi_a3 = 1 << phi_v0;
+ } else if (temp_a0 == temp_v1) {
+ phi_a3 = phi_a3_2 | (1 << phi_v0);
+ }
+ temp_v0 = phi_v0 + 1;
+ temp_a1 = phi_a1 + 4;
+ phi_a1 = temp_a1;
+ phi_a2 = phi_a2_2;
+ phi_v0 = temp_v0;
+ phi_a3_2 = phi_a3;
+ } while (temp_v0 != 3);
+ sp18 = phi_a2_2;
+ sp24 = phi_a3;
+ temp_a1_2 = phi_a2_2->unk20;
+ phi_v0_2 = 0;
+ if (temp_a1_2 < (func_800B4F2C(temp_a0, temp_a1, phi_a2_2, phi_a3) & 0xFFFFF)) {
+ temp_v0_2 = ((sp38 / 4) * 0x60) + ((sp38 % 4) * 0x18) + &D_8018EB90;
+ sp20 = temp_v0_2;
+ sp24 = phi_a3;
+ func_800B4DCC(temp_v0_2 + 0xF, temp_a1_2, sp28, phi_a3);
+ temp_v0_2->unk12 = 1;
+ func_800B45E0(sp38);
+ phi_v0_2 = sp24;
+ }
+ return phi_v0_2;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5218.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4670(); // extern
+s32 func_800B54EC(s8, u8, s32); // extern
+u8 func_800B5508(s8, u8, s32); // extern
+? func_800B5948(); // extern
+extern ? D_8018EB90;
+extern s8 gCupSelection;
+
+void func_800B536C(s32 arg0) {
+ u8 *sp1C;
+ s32 temp_a2;
+ s32 temp_v1;
+ u8 *temp_v0;
+
+ temp_a2 = arg0;
+ if (arg0 >= 0) {
+ temp_v0 = D_800DC548 + 0x180 + &D_8018EB90;
+ arg0 = temp_a2;
+ sp1C = temp_v0;
+ temp_v1 = 3 - arg0;
+ if ((arg0 < 3) && (func_800B54EC(gCupSelection, *temp_v0, temp_a2) < temp_v1)) {
+ *sp1C = func_800B5508(gCupSelection, *sp1C, temp_v1);
+ func_800B4670();
+ func_800B5948();
+ }
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B536C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B4670(); // extern
+s32 func_800B54EC(s32, u8, s32, void *); // extern
+u8 func_800B5508(s32, u8, s32, void *); // extern
+? func_800B5948(); // extern
+extern ? D_8018EB90;
+
+void func_800B5404(s32 arg0, s32 arg1) {
+ s32 sp30;
+ s32 sp20;
+ void *sp1C;
+ u8 *sp18;
+ s32 temp_a0;
+ s32 temp_a2;
+ s32 temp_v1;
+ u8 *temp_v1_2;
+ void *temp_a3;
+
+ temp_a2 = arg0;
+ if (arg0 >= 0) {
+ temp_a0 = arg1 / 4;
+ temp_a3 = (arg1 % 4) + &D_8018EB90;
+ sp1C = temp_a3;
+ sp20 = temp_a0;
+ arg0 = temp_a2;
+ if (arg0 < 3) {
+ temp_v1 = 3 - arg0;
+ sp30 = temp_v1;
+ if (func_800B54EC(temp_a0, temp_a3->unk180, temp_a2, temp_a3) < temp_v1) {
+ temp_v1_2 = temp_a3 + 0x180;
+ sp18 = temp_v1_2;
+ *temp_v1_2 = func_800B5508(temp_a0, *temp_v1_2, sp30, temp_a3);
+ func_800B4670();
+ func_800B5948();
+ }
+ }
+ }
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5404.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B54EC(u8, s32); // extern
+extern ? D_8018ED10;
+
+void func_800B54C0(s32 arg1) {
+ func_800B54EC(*(&D_8018ED10 + arg1), arg1);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B54C0.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B54EC(s32 arg0, s32 arg1) {
+ s32 temp_v1;
+
+ temp_v1 = arg0 * 2;
+ return ((arg1 & (3 << temp_v1)) >> temp_v1) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B54EC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B5508(s32 arg0, s32 arg1, s32 arg2) {
+ s32 temp_v1;
+
+ temp_v1 = arg0 * 2;
+ return ((arg1 & ~(3 << temp_v1)) | (arg2 << temp_v1)) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5508.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018ED10;
+
+? func_800B5530(s32 arg0) {
+ if (*(&D_8018ED10 + arg0) == 0xFF) {
+ return 1;
+ }
+ return 0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5530.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B5530(?); // extern
+
+void func_800B555C(void) {
+ func_800B5530(2);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B555C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B4874(s32, void *, void *); // extern
+s8 func_800B578C(s32, void *, void *); // extern
+s8 func_800B5888(s32); // extern
+extern u8 D_800F2E60;
+extern ? D_8018EB90;
+extern OSMesgQueue gSIEventMesgQueue;
+
+void func_800B559C(s32 arg0, void *arg1, void *arg2) {
+ s32 temp_s1;
+ s32 temp_s1_2;
+ s32 temp_s6;
+ s32 temp_v0;
+ s32 temp_v0_2;
+ u8 *temp_s2_2;
+ void *temp_a0;
+ void *temp_a1;
+ void *temp_a1_2;
+ void *temp_a2;
+ void *temp_s2;
+ void *temp_v1;
+ void *temp_v1_2;
+ s32 phi_s1;
+ void *phi_a1;
+ void *phi_a2;
+ u8 *phi_a0;
+ s32 phi_v0;
+ s32 phi_v0_2;
+ void *phi_a1_2;
+ void *phi_a2_2;
+ void *phi_a1_3;
+
+ temp_s6 = arg0 / 8;
+ temp_s1 = temp_s6 * 8;
+ phi_s1 = temp_s1;
+ phi_a1 = arg1;
+ phi_a2 = arg2;
+ phi_a1_2 = arg1;
+ phi_a2_2 = arg2;
+ if (temp_s1 < (temp_s1 + 8)) {
+ temp_s2 = (temp_s6 * 0x38) + 0x188 + &D_8018EB90;
+ do {
+ temp_a2 = &D_8018EB90 + ((phi_s1 / 4) * 0x60) + ((phi_s1 % 4) * 0x18);
+ phi_a2 = temp_a2;
+ phi_a0 = &D_800F2E60;
+ phi_v0 = 0;
+ phi_v0_2 = 0;
+ phi_a2_2 = temp_a2;
+ if (temp_a2->unk17 != func_800B4874(phi_s1, phi_a1, phi_a2)) {
+ temp_a1 = temp_s2 + ((phi_s1 % 8) * 3);
+ phi_a1_3 = temp_a1;
+ do {
+ temp_v1 = temp_a1 + phi_v0;
+ temp_v0 = phi_v0 + 1;
+ temp_v1->unk0 = *phi_a0;
+ temp_v1->unk18 = *phi_a0;
+ phi_a0 += 1;
+ phi_v0 = temp_v0;
+ } while (temp_v0 != 3);
+ } else {
+ temp_a1_2 = temp_s2 + ((phi_s1 % 8) * 3);
+ phi_a1_3 = temp_a1_2;
+ do {
+ temp_a0 = temp_a2 + phi_v0_2;
+ temp_v1_2 = temp_a1_2 + phi_v0_2;
+ temp_v0_2 = phi_v0_2 + 1;
+ temp_v1_2->unk0 = temp_a0->unk0;
+ temp_v1_2->unk18 = temp_a0->unkF;
+ phi_v0_2 = temp_v0_2;
+ } while (temp_v0_2 != 3);
+ }
+ temp_s1_2 = phi_s1 + 1;
+ phi_s1 = temp_s1_2;
+ phi_a1 = phi_a1_3;
+ phi_a1_2 = phi_a1_3;
+ } while (temp_s1_2 < ((temp_s6 * 8) + 8));
+ }
+ temp_s2_2 = &D_8018EB90 + (temp_s6 * 0x38) + 0x188;
+ temp_s2_2->unk36 = func_800B578C(temp_s6, phi_a1_2, phi_a2_2);
+ temp_s2_2->unk37 = func_800B5888(temp_s6);
+ osEepromLongWrite(&gSIEventMesgQueue, ((temp_s2_2 - &D_8018EB90) >> 3) & 0xFF, temp_s2_2, 0x38);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B559C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018EB90;
+
+s32 func_800B578C(s32 arg0) {
+ s32 temp_a0;
+ s32 temp_a1;
+ s32 temp_v1;
+ u8 *temp_a2;
+ void *temp_a3;
+ s32 phi_a0;
+ s32 phi_v0;
+ s32 phi_v1;
+ void *phi_a3;
+ s32 phi_v1_2;
+ u8 *phi_t0;
+ u8 *phi_a2;
+
+ temp_a2 = (arg0 * 0x38) + 0x188 + &D_8018EB90;
+ phi_v0 = 0;
+ phi_v1_2 = 0;
+ phi_t0 = temp_a2;
+ phi_a2 = temp_a2;
+ do {
+ temp_a1 = phi_v0 + 1;
+ phi_a0 = 1;
+ phi_v0 = temp_a1;
+ phi_v1 = phi_v1_2 + ((*phi_t0 + 1) * temp_a1);
+ phi_a3 = phi_a2 + 1;
+ phi_a2 += 0x11;
+loop_2:
+ temp_a3 = phi_a3 + 4;
+ temp_a0 = phi_a0 + 4;
+ temp_v1 = phi_v1 + ((phi_a3->unk0 + 1) * temp_a1) + phi_a0 + ((phi_a3->unk1 + 1) * temp_a1) + phi_a0 + 1 + ((temp_a3->unk-2 + 1) * temp_a1) + phi_a0 + 2 + ((temp_a3->unk-1 + 1) * temp_a1) + phi_a0 + 3;
+ phi_a0 = temp_a0;
+ phi_v1 = temp_v1;
+ phi_a3 = temp_a3;
+ phi_v1_2 = temp_v1;
+ if (temp_a0 != 0x11) {
+ goto loop_2;
+ }
+ phi_t0 += 0x11;
+ } while (temp_a1 != 3);
+ return (temp_v1 % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B578C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018ED4E;
+
+s32 func_800B5888(s32 arg0) {
+ return ((*(&D_8018ED4E + (arg0 * 0x38)) + 0x5A) % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5888.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B578C(s32, s32); // extern
+s32 func_800B5888(s32); // extern
+extern ? D_8018EB90;
+
+? func_800B58C4(s32 arg0) {
+ s32 sp1C;
+ void *sp18;
+ s32 temp_a0;
+ void *temp_v1;
+
+ temp_a0 = arg0 / 8;
+ sp1C = temp_a0;
+ temp_v1 = (temp_a0 * 0x38) + 0x188 + &D_8018EB90;
+ if ((temp_v1->unk36 != func_800B578C(temp_a0, arg0)) || (sp18 = temp_v1, (temp_v1->unk37 != func_800B5888(temp_a0)))) {
+ return 1;
+ }
+ return 0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B58C4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s8 func_800B59F4(); // extern
+s8 func_800B5AAC(); // extern
+extern ? D_8018EB90;
+extern u8 D_8018ED10;
+extern u8 D_8018ED11;
+extern u8 D_8018ED12;
+extern u8 D_8018ED13;
+extern u8 D_8018ED14;
+extern u8 D_8018ED88;
+extern u8 D_8018ED89;
+extern u8 D_8018ED8A;
+extern u8 D_8018ED8B;
+extern u8 D_8018ED8C;
+extern s8 D_8018ED8E;
+extern s8 D_8018ED8F;
+extern OSMesgQueue gSIEventMesgQueue;
+
+void func_800B5948(void) {
+ D_8018ED88 = D_8018ED10;
+ D_8018ED89 = D_8018ED11;
+ D_8018ED8A = D_8018ED12;
+ D_8018ED8B = D_8018ED13;
+ D_8018ED8C = D_8018ED14;
+ D_8018ED8E = func_800B59F4();
+ D_8018ED8F = func_800B5AAC();
+ osEepromLongWrite(&gSIEventMesgQueue, ((&D_8018ED88 - &D_8018EB90) >> 3) & 0xFF, &D_8018ED88, 8);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5948.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern u8 D_8018ED88;
+
+s32 func_800B59F4(void) {
+ void *temp_a0;
+
+ temp_a0 = &D_8018ED88 + 1;
+ return ((D_8018ED88 + 1 + ((temp_a0->unk0 + 1) * 2) + 1 + ((temp_a0->unk1 + 1) * 3) + 1 + 1 + ((temp_a0->unk2 + 1) * 4) + 1 + 2 + ((temp_a0->unk3 + 1) * 5) + 1 + 3) % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B59F4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern u8 D_8018ED8E;
+
+s32 func_800B5AAC(void) {
+ return ((D_8018ED8E + 0x5A) % 0x100) & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5AAC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B59F4(); // extern
+s32 func_800B5AAC(); // extern
+extern u8 D_8018ED8E;
+extern u8 D_8018ED8F;
+
+? func_800B5AD8(void) {
+ if ((D_8018ED8E != func_800B59F4()) || (D_8018ED8F != func_800B5AAC())) {
+ return 1;
+ }
+ return 0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5AD8.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern OSMesgQueue gSIEventMesgQueue;
+
+? func_800B5B2C(s32 arg0) {
+ u8 sp1F;
+ ? phi_v0;
+
+ if ((arg0 >= 4) || (arg0 < 0)) {
+ return 0;
+ }
+ arg0 = arg0;
+ osPfsIsPlug(&gSIEventMesgQueue, &sp1F);
+ phi_v0 = 0;
+ if ((sp1F & (1 << arg0)) != 0) {
+ phi_v0 = 1;
+ }
+ return phi_v0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5B2C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B5B2C(?); // extern
+s32 func_800CE720(? *, OSPfs *, ?); // extern
+extern u16 D_800E86F0;
+extern u32 D_800E86F4;
+extern s8 D_800E86F8;
+extern u8 D_800F2E64;
+extern u8 D_800F2E74;
+extern OSPfs D_8018E868;
+extern s32 D_8018EB78;
+extern s32 D_8018EB7C;
+extern s32 D_8018EB80;
+extern s32 D_8018EB84;
+extern ? gSIEventMesgQueue;
+
+? func_800B5B94(void) {
+ s32 temp_v0_2;
+ s32 temp_v0_3;
+ s8 temp_v0;
+ s8 phi_v0;
+ ? phi_v0_2;
+
+ temp_v0 = D_800E86F8;
+ phi_v0 = temp_v0;
+ if (temp_v0 != 0) {
+ temp_v0_2 = osPfsFindFile(&D_8018E868, D_800E86F0, D_800E86F4, &D_800F2E64, &D_800F2E74, &D_8018EB84);
+ if (temp_v0_2 != 0) {
+ if (temp_v0_2 != 2) {
+ if (temp_v0_2 != 5) {
+ D_800E86F8 = 0;
+ goto block_8;
+ }
+ phi_v0 = D_800E86F8;
+ } else {
+ D_800E86F8 = 0;
+block_8:
+ phi_v0 = 0;
+ }
+ goto block_9;
+ }
+ return 0;
+ }
+block_9:
+ if (phi_v0 == 0) {
+ if (func_800B5B2C(0) == 0) {
+ return 1;
+ }
+ temp_v0_3 = func_800CE720(&gSIEventMesgQueue, &D_8018E868, 0);
+ if (temp_v0_3 != 0) {
+ if (temp_v0_3 != 1) {
+ if (temp_v0_3 != 4) {
+ if (temp_v0_3 != 0xA) {
+ if (temp_v0_3 == 0xB) {
+ goto block_17;
+ }
+ goto block_19;
+ }
+ return 2;
+ }
+block_19:
+ return 2;
+ }
+block_17:
+ return 1;
+ }
+ D_800E86F8 = 1;
+ if (osPfsFindFile(&D_8018E868, D_800E86F0, D_800E86F4, &D_800F2E64, &D_800F2E74, &D_8018EB84) == 0) {
+ return 0;
+ }
+ if (osPfsNumFiles(&D_8018E868, &D_8018EB78, &D_8018EB7C) != 0) {
+ return 2;
+ }
+ if (osPfsFreeBlocks(&D_8018E868, &D_8018EB80) != 0) {
+ return 2;
+ }
+ D_8018EB80 = D_8018EB80 >> 8;
+ goto block_27;
+ }
+block_27:
+ if (D_8018EB7C >= D_8018EB78) {
+ return 4;
+ }
+ phi_v0_2 = 4;
+ if (D_8018EB80 >= 0x79) {
+ phi_v0_2 = -1;
+ }
+ return phi_v0_2;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5B94.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B5B2C(?); // extern
+s32 func_800CE720(? *, OSPfs *, ?); // extern
+extern u16 D_800E86F0;
+extern u32 D_800E86F4;
+extern s8 D_800E86FC;
+extern u8 D_800F2E64;
+extern u8 D_800F2E74;
+extern OSPfs D_8018E8D0;
+extern s32 D_8018EB88;
+extern ? gSIEventMesgQueue;
+
+s8 func_800B5DA4(void) {
+ s32 temp_v0_2;
+ s32 temp_v0_3;
+ s32 temp_v0_4;
+ s8 temp_v0;
+ s8 phi_v0;
+ s8 phi_v0_2;
+
+ temp_v0 = D_800E86FC;
+ phi_v0 = temp_v0;
+ if (temp_v0 != 0) {
+ temp_v0_2 = osPfsFindFile(&D_8018E8D0, D_800E86F0, D_800E86F4, &D_800F2E64, &D_800F2E74, &D_8018EB88);
+ if (temp_v0_2 != 0) {
+ if (temp_v0_2 != 2) {
+ if (temp_v0_2 != 5) {
+ goto block_7;
+ }
+ return -1;
+ }
+block_7:
+ D_800E86FC = 0;
+ phi_v0 = 0;
+ goto block_8;
+ }
+ return 0;
+ }
+block_8:
+ phi_v0_2 = phi_v0;
+ if (phi_v0 == 0) {
+ if (func_800B5B2C(1) == 0) {
+ return 1;
+ }
+ temp_v0_3 = func_800CE720(&gSIEventMesgQueue, &D_8018E8D0, 1);
+ if (temp_v0_3 != 0) {
+ if (temp_v0_3 != 1) {
+ if (temp_v0_3 != 4) {
+ if (temp_v0_3 != 0xA) {
+ if (temp_v0_3 == 0xB) {
+ goto block_16;
+ }
+ goto block_18;
+ }
+ goto block_25;
+ }
+block_18:
+ goto block_25;
+ }
+block_16:
+ return 1;
+ }
+ D_800E86FC = 1;
+ temp_v0_4 = osPfsFindFile(&D_8018E8D0, D_800E86F0, D_800E86F4, &D_800F2E64, &D_800F2E74, &D_8018EB88);
+ if (temp_v0_4 != 0) {
+ if (temp_v0_4 != 2) {
+ if (temp_v0_4 != 5) {
+ goto block_25;
+ }
+ return -1;
+ }
+block_25:
+ phi_v0_2 = 2;
+ // Duplicate return node #26. Try simplifying control flow for better match
+ return phi_v0_2;
+ }
+ return 0;
+ }
+ return phi_v0_2;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5DA4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B5B2C(?); // extern
+s32 func_800CE720(? *, OSPfs *, ?); // extern
+extern s8 D_800E86F8;
+extern OSPfs D_8018E868;
+extern s32 D_8018EB78;
+extern s32 D_8018EB7C;
+extern s32 D_8018EB80;
+extern ? gSIEventMesgQueue;
+
+s32 func_800B5F30(void) {
+ s32 sp1C;
+
+ if (D_800E86F8 != 0) {
+ return -4;
+ }
+ if (func_800B5B2C(0) != 0) {
+ sp1C = func_800CE720(&gSIEventMesgQueue, &D_8018E868, 0);
+ if (osPfsNumFiles(&D_8018E868, &D_8018EB78, &D_8018EB7C) != 0) {
+ D_800E86F8 = 0;
+ return -2;
+ }
+ if (osPfsFreeBlocks(&D_8018E868, &D_8018EB80) != 0) {
+ D_800E86F8 = 0;
+ return -3;
+ }
+ D_8018EB80 = D_8018EB80 >> 8;
+ if (sp1C == 0) {
+ D_800E86F8 = 1;
+ }
+ return sp1C;
+ }
+ return -1;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B5F30.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B5B2C(?); // extern
+s32 func_800CE720(? *, ? *, ?); // extern
+extern s8 D_800E86FC;
+extern ? D_8018E8D0;
+extern ? gSIEventMesgQueue;
+
+s32 func_800B6014(void) {
+ s32 temp_v0;
+
+ if (D_800E86FC != 0) {
+ return -4;
+ }
+ if (func_800B5B2C(1) != 0) {
+ temp_v0 = func_800CE720(&gSIEventMesgQueue, &D_8018E8D0, 1);
+ if (temp_v0 == 0) {
+ D_800E86FC = 1;
+ }
+ return temp_v0;
+ }
+ return -1;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6014.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s8 func_800B6828(); // extern
+extern OSPfs D_8018E868;
+extern s32 D_8018EB84;
+extern ? D_8018EE10;
+
+void func_800B6088(s32 arg0) {
+ s32 temp_t6;
+ u8 *temp_v1;
+
+ temp_t6 = arg0 << 7;
+ temp_v1 = temp_t6 + &D_8018EE10;
+ temp_v1->unk7F = func_800B6828();
+ osPfsReadWriteFile(&D_8018E868, D_8018EB84, 1, temp_t6, 0x80, temp_v1);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6088.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern s32 D_800DC714;
+
+s32 func_800B60E8(s32 arg0) {
+ s32 temp_a2;
+ s32 temp_v0;
+ s32 temp_v1;
+ s32 phi_v0;
+ s32 phi_v1;
+ void *phi_a1;
+
+ temp_a2 = arg0 + 1;
+ phi_v0 = 0;
+ phi_v1 = 0;
+ phi_a1 = D_800DC714 + (arg0 << 8);
+ do {
+ temp_v0 = phi_v0 + 4;
+ temp_v1 = phi_v1 + ((phi_a1->unk0 * temp_a2) + phi_v0) + ((phi_a1->unk1 * temp_a2) + phi_v0) + 1 + ((phi_a1->unk2 * temp_a2) + phi_v0) + 2 + ((phi_a1->unk3 * temp_a2) + phi_v0) + 3;
+ phi_v0 = temp_v0;
+ phi_v1 = temp_v1;
+ phi_a1 += 4;
+ } while (temp_v0 != 0x100);
+ return temp_v1 & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B60E8.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800051C4(); // extern
+s32 func_800B6088(s32); // extern
+s8 func_800B60E8(s32); // extern
+extern u8 *D_800DC714;
+extern s32 D_80162DFC;
+extern OSPfs D_8018E868;
+extern s32 D_8018EB84;
+extern ? D_8018EE10;
+extern s8 gCupSelection;
+
+s32 func_800B6178(s32 arg0) {
+ s32 temp_s0_2;
+ s32 temp_v0;
+ s32 temp_v0_2;
+ s32 temp_v0_3;
+ s32 temp_v1;
+ s8 temp_s0;
+ s8 temp_s0_3;
+ void *temp_s1;
+ void *temp_s3;
+ s8 phi_s0;
+ void *phi_s1;
+ s32 phi_s0_2;
+ void *phi_s1_2;
+ s32 phi_v0;
+ s8 phi_s0_3;
+ void *phi_s1_3;
+ s32 phi_v1;
+
+ if ((arg0 != 0) && (arg0 != 1)) {
+ return -1;
+ }
+ if (D_800DC50C == 4) {
+ func_800051C4();
+ }
+ temp_s3 = (arg0 << 7) + &D_8018EE10;
+ temp_s3->unk4 = 0;
+ temp_v0 = func_800B6088(arg0);
+ temp_v1 = temp_v0;
+ phi_v1 = temp_v1;
+ if (temp_v0 != 0) {
+ temp_s3->unk4 = 0;
+ phi_s0 = 0;
+ phi_s1 = temp_s3;
+ do {
+ phi_s1->unk7 = phi_s0;
+ temp_s0 = phi_s0 + 4;
+ phi_s1->unkA = phi_s0 + 3;
+ phi_s1->unk9 = phi_s0 + 2;
+ phi_s1->unk8 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ phi_s1 += 4;
+ } while (temp_s0 != 0x3C);
+ } else {
+ temp_v0_2 = osPfsReadWriteFile(&D_8018E868, D_8018EB84, 1, (arg0 * 0x3C00) + 0x100, 0x3C00, D_800DC714);
+ phi_v0 = temp_v0_2;
+ phi_v1 = temp_v0_2;
+ if (temp_v0_2 == 0) {
+ temp_s3->unk4 = 1;
+ if (D_800DC50C == 4) {
+ temp_s3->unk5 = (gCupSelection * 4) + gCourseSelection;
+ }
+ temp_s3->unk0 = D_80162DFC;
+ temp_s3->unk6 = D_80162DE0;
+ phi_s0_2 = 0;
+ phi_s1_2 = temp_s3;
+ do {
+ temp_s0_2 = phi_s0_2 + 1;
+ temp_s1 = phi_s1_2 + 1;
+ temp_s1->unk6 = func_800B60E8(phi_s0_2);
+ phi_s0_2 = temp_s0_2;
+ phi_s1_2 = temp_s1;
+ } while (temp_s0_2 != 0x3C);
+ temp_v0_3 = func_800B6088(arg0);
+ phi_v0 = temp_v0_3;
+ phi_v1 = temp_v0_3;
+ }
+ if (phi_v0 != 0) {
+ temp_s3->unk4 = 0;
+ phi_s0_3 = 0;
+ phi_s1_3 = temp_s3;
+ do {
+ phi_s1_3->unk7 = phi_s0_3;
+ temp_s0_3 = phi_s0_3 + 4;
+ phi_s1_3->unkA = phi_s0_3 + 3;
+ phi_s1_3->unk9 = phi_s0_3 + 2;
+ phi_s1_3->unk8 = phi_s0_3 + 1;
+ phi_s0_3 = temp_s0_3;
+ phi_s1_3 += 4;
+ } while (temp_s0_3 != 0x3C);
+ }
+ }
+ return phi_v1;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6178.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018EE10;
+
+? func_800B6348(s32 arg0) {
+ if ((D_8018EE10.unk4 != 0) && (arg0 == D_8018EE10.unk5)) {
+ return 0;
+ }
+ if ((D_8018EE10.unk84 != 0) && (arg0 == D_8018EE10.unk85)) {
+ return 1;
+ }
+ return 0;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6348.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018EE10;
+
+? func_800B639C(s32 arg0) {
+ if ((D_8018EE10.unk4 != 0) && (arg0 == D_8018EE10.unk5)) {
+ return 0;
+ }
+ if ((D_8018EE10.unk84 != 0) && (arg0 == D_8018EE10.unk85)) {
+ return 1;
+ }
+ return -1;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B639C.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800051C4(); // extern
+? func_80005AE8(Player *); // extern
+s32 func_800B60E8(s32); // extern
+extern s16 D_80162DD6;
+extern s32 D_80162DFC;
+extern ? D_8018EE10;
+extern s8 gCupSelection;
+
+? func_800B63F0(s32 arg0) {
+ s32 temp_s0;
+ void *temp_v0;
+ s32 phi_s0;
+ void *phi_s1;
+ ? phi_s3;
+
+ func_800051C4();
+ D_80162DD6 = 1;
+ func_80005AE8(D_800DC4E4);
+ temp_v0 = (arg0 << 7) + &D_8018EE10;
+ phi_s3 = 0;
+ if (((gCupSelection * 4) + gCourseSelection) != temp_v0->unk5) {
+ phi_s3 = 2;
+ } else if (D_80162DFC != temp_v0->unk0) {
+ phi_s3 = 3;
+ } else {
+ phi_s0 = 0;
+ phi_s1 = temp_v0;
+ if (D_80162DE0 != temp_v0->unk6) {
+ phi_s3 = 4;
+ } else {
+loop_6:
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ if (phi_s1->unk7 != func_800B60E8(phi_s0)) {
+ phi_s3 = 1;
+ } else {
+ phi_s1 += 1;
+ if (temp_s0 != 0x3C) {
+ goto loop_6;
+ }
+ }
+ }
+ }
+ return phi_s3;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B63F0.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_8000522C(); // extern
+s32 func_800B60E8(s32); // extern
+extern u8 *D_800DC714;
+extern s32 D_80162DFC;
+extern OSPfs D_8018E868;
+extern s32 D_8018EB84;
+extern ? D_8018EE10;
+
+s32 func_800B64EC(s32 arg0) {
+ s32 sp30;
+ s32 temp_s0;
+ s32 temp_v0;
+ void *temp_s3;
+ s32 phi_s0;
+ void *phi_s1;
+
+ if ((arg0 != 0) && (arg0 != 1)) {
+ return -1;
+ }
+ temp_v0 = osPfsReadWriteFile(&D_8018E868, D_8018EB84, 0, (arg0 * 0x3C00) + 0x100, 0x3C00, D_800DC714);
+ sp30 = temp_v0;
+ if (temp_v0 == 0) {
+ temp_s3 = (arg0 << 7) + &D_8018EE10;
+ phi_s0 = 0;
+ phi_s1 = temp_s3;
+loop_5:
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ if (phi_s1->unk7 != func_800B60E8(phi_s0)) {
+ temp_s3->unk4 = 0;
+ return -2;
+ }
+ phi_s1 += 1;
+ if (temp_s0 == 0x3C) {
+ func_8000522C();
+ *D_80162DD4 = 0;
+ D_80162DE0 = temp_s3->unk6;
+ D_80162DFC = temp_s3->unk0;
+ goto block_9;
+ }
+ goto loop_5;
+ }
+block_9:
+ return sp30;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B64EC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B60E8(s32); // extern
+extern u8 *D_800DC714;
+extern s32 D_80162DFC;
+extern s32 D_8018D9C0;
+extern OSPfs D_8018E8D0;
+extern s32 D_8018EB88;
+extern ? D_8018EE15;
+
+s32 func_800B65F4(s32 arg0, s32 arg1) {
+ s32 sp34;
+ s32 temp_s0;
+ s32 temp_v0;
+ void *temp_s3;
+ s32 phi_s0;
+ void *phi_s1;
+
+ if ((arg0 != 0) && (arg0 != 1)) {
+ return -1;
+ }
+ temp_v0 = osPfsReadWriteFile(&D_8018E8D0, D_8018EB88, 0, (arg0 * 0x3C00) + 0x100, 0x3C00, D_800DC714);
+ sp34 = temp_v0;
+ if (temp_v0 == 0) {
+ temp_s3 = D_8018D9C0 + (arg0 << 7);
+ phi_s0 = 0;
+ phi_s1 = temp_s3;
+loop_5:
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ if (phi_s1->unk7 != func_800B60E8(phi_s0)) {
+ temp_s3->unk4 = 0;
+ return -2;
+ }
+ phi_s1 += 1;
+ if (temp_s0 == 0x3C) {
+ D_80162DE0 = temp_s3->unk6;
+ D_80162DFC = temp_s3->unk0;
+ *(&D_8018EE15 + (arg1 << 7)) = temp_s3->unk5;
+ goto block_9;
+ }
+ goto loop_5;
+ }
+block_9:
+ return sp34;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B65F4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B6828(s32); // extern
+extern OSPfs D_8018E868;
+extern s32 D_8018EB84;
+extern u8 D_8018EE10;
+
+void func_800B6708(void) {
+ s32 temp_s0;
+ s32 phi_s0;
+ u8 *phi_s1;
+
+ osPfsReadWriteFile(&D_8018E868, D_8018EB84, 0, 0, 0x100, &D_8018EE10);
+ phi_s0 = 0;
+ phi_s1 = &D_8018EE10;
+ do {
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ if (phi_s1->unk7F != func_800B6828(phi_s0)) {
+ phi_s1->unk4 = 0;
+ }
+ phi_s1 += 0x80;
+ } while (temp_s0 != 2);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6708.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s32 func_800B68F4(s32); // extern
+extern u8 *D_8018D9C0;
+extern OSPfs D_8018E8D0;
+extern s32 D_8018EB88;
+
+void func_800B6798(void) {
+ s32 temp_s0;
+ u8 *temp_s2;
+ void *temp_v1;
+ s32 phi_s0;
+
+ temp_s2 = D_8018D9C0;
+ osPfsReadWriteFile(&D_8018E8D0, D_8018EB88, 0, 0, 0x100, temp_s2);
+ phi_s0 = 0;
+ do {
+ temp_v1 = temp_s2 + (phi_s0 << 7);
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ if (temp_v1->unk7F != func_800B68F4(phi_s0)) {
+ temp_v1->unk4 = 0;
+ }
+ } while (temp_s0 != 2);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6798.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern ? D_8018EE10;
+
+s32 func_800B6828(s32 arg0) {
+ s32 temp_a1;
+ s32 temp_a2;
+ s32 temp_v1;
+ void *temp_v0;
+ s32 phi_a1;
+ s32 phi_v1;
+ void *phi_a3;
+
+ temp_v0 = (arg0 << 7) + &D_8018EE10;
+ temp_a2 = arg0 + 1;
+ phi_a1 = 3;
+ phi_v1 = (temp_v0->unk0 * temp_a2) + (temp_v0->unk1 * temp_a2) + 1 + (temp_v0->unk2 * temp_a2) + 2;
+ phi_a3 = temp_v0 + 3;
+ do {
+ temp_a1 = phi_a1 + 4;
+ temp_v1 = phi_v1 + ((phi_a3->unk0 * temp_a2) + phi_a1) + ((phi_a3->unk1 * temp_a2) + phi_a1) + 1 + ((phi_a3->unk2 * temp_a2) + phi_a1) + 2 + ((phi_a3->unk3 * temp_a2) + phi_a1) + 3;
+ phi_a1 = temp_a1;
+ phi_v1 = temp_v1;
+ phi_a3 += 4;
+ } while (temp_a1 != 0x43);
+ return temp_v1 & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6828.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+extern s32 D_8018D9C0;
+
+s32 func_800B68F4(s32 arg0) {
+ s32 temp_a1;
+ s32 temp_a2;
+ s32 temp_a3;
+ void *temp_v0;
+ void *temp_v1;
+ s32 phi_a2;
+ s32 phi_a1;
+
+ temp_a3 = arg0 + 1;
+ temp_v1 = (arg0 << 7) + D_8018D9C0;
+ phi_a2 = 3;
+ phi_a1 = (temp_v1->unk0 * temp_a3) + (temp_v1->unk1 * temp_a3) + 1 + (temp_v1->unk2 * temp_a3) + 2;
+ do {
+ temp_v0 = temp_v1 + phi_a2;
+ temp_a2 = phi_a2 + 4;
+ temp_a1 = phi_a1 + ((temp_v0->unk0 * temp_a3) + phi_a2) + ((temp_v0->unk1 * temp_a3) + phi_a2) + 1 + ((temp_v0->unk2 * temp_a3) + phi_a2) + 2 + ((temp_v0->unk3 * temp_a3) + phi_a2) + 3;
+ phi_a2 = temp_a2;
+ phi_a1 = temp_a1;
+ } while (temp_a2 != 0x43);
+ return temp_a1 & 0xFF;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B68F4.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+s8 func_800B6828(s32, s32, s32); // extern
+extern OSPfs D_8018E868;
+extern s32 D_8018EB84;
+extern ? D_8018EE10;
+
+void func_800B69BC(s32 arg0) {
+ s32 sp24;
+ u8 *sp20;
+ s32 temp_a3;
+ s8 temp_v0;
+ u8 *temp_t0;
+ s8 phi_v0;
+ u8 *phi_v1;
+
+ temp_a3 = arg0 << 7;
+ temp_t0 = temp_a3 + &D_8018EE10;
+ temp_t0->unk4 = 0;
+ temp_t0->unk5 = 0;
+ temp_t0->unk6 = 0;
+ phi_v0 = 0;
+ phi_v1 = temp_t0;
+ do {
+ phi_v1->unk7 = phi_v0;
+ temp_v0 = phi_v0 + 4;
+ phi_v1->unkA = phi_v0 + 3;
+ phi_v1->unk9 = phi_v0 + 2;
+ phi_v1->unk8 = phi_v0 + 1;
+ phi_v0 = temp_v0;
+ phi_v1 += 4;
+ } while (temp_v0 != 0x3C);
+ sp24 = temp_a3;
+ sp20 = temp_t0;
+ temp_t0->unk7F = func_800B6828(arg0, arg0, temp_a3);
+ osPfsReadWriteFile(&D_8018E868, D_8018EB84, 1, temp_a3, 0x80, temp_t0);
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B69BC.s")
+#endif
+
+#ifdef MIPS_TO_C
+//generated by mips_to_c commit 3c3b0cede1a99430bfd3edf8d385802b94f91307
+? func_800B69BC(s32); // extern
+extern u16 D_800E86F0;
+extern u32 D_800E86F4;
+extern u8 D_800F2E64;
+extern u8 D_800F2E74;
+extern OSPfs D_8018E868;
+extern s32 D_8018EB84;
+
+s32 func_800B6A68(void) {
+ s32 sp30;
+ s32 temp_s0;
+ s32 temp_v0;
+ s32 phi_s0;
+
+ temp_v0 = osPfsAllocateFile(&D_8018E868, D_800E86F0, D_800E86F4, &D_800F2E64, &D_800F2E74, 0x7900, &D_8018EB84);
+ sp30 = temp_v0;
+ if (temp_v0 == 0) {
+ phi_s0 = 0;
+ do {
+ func_800B69BC(phi_s0);
+ temp_s0 = phi_s0 + 1;
+ phi_s0 = temp_s0;
+ } while (temp_s0 != 2);
+ }
+ return sp30;
+}
+#else
+GLOBAL_ASM("asm/non_matchings/code_800AF9B0/func_800B6A68.s")
+#endif
generated by cgit v1.2.3 (git 2.25.1) at 2026-08-03 04:57:01 +0000