dolphin/Source/Core/Common/Arm64Emitter.cpp, branch stable

[AArch64] Add ASIMD LDR/STR with register offset

2015-06-08T00:53:05+00:00

[AArch64] Upstream PPSSPP's emitter changes.

2015-06-08T00:50:21+00:00

Requires a minor change to in the JIT to make sure everything still works.

Set copyright year to when a file was created

2015-05-25T11:22:31+00:00

Update license headers to GPLv2+

2015-05-25T11:22:31+00:00

[AArch64] Add an assert to SMOV in the emitter.

2015-03-08T17:29:45+00:00

SMOV doesn't have an encoding for moving a 32bit element to a 32bit GPR.
One should use UMOV if they want that.

[AArch64] Handle FPR island registers in a less dumb way.

2015-03-03T06:30:05+00:00

[AArch64] Stop violating the AAPCS64 so much.

2015-03-02T17:21:15+00:00

[AArch64] Implemented paired pushing/popping for the VFP.

2015-03-02T12:27:47+00:00

A bit more efficient if we are only pushing two VFP registers.
We can probably be a bit more efficient in the future by mixing paired loadstores in to the other paths as well.

[AArch64] Implement VFP loadstore paired in the emitter.

2015-03-02T12:27:17+00:00

[AArch64] Optimize FPR pushing and popping.

2015-03-02T12:27:13+00:00

Previously on FPR pushing and popping we would do a single STR/LDR per quad FPR we wanted to push/pop.
In most of our cases when we are pushing and popping VFP registers they will be consecutive registers that will save more efficiently using the NEON
loadstores that can do up to four quad registers.
So this can potentially cutting instructions down to ~1/4th the amount of instructions if the registers are all consecutive.

On the Cortex-A57 this is basically just an icache improvement, but on the Nvidia Denver this may be optimized to be more efficient. Either way it's a
win.