summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSintendo <3380580+Sintendo@users.noreply.github.com>2025-02-01 16:57:40 +0100
committerSintendo <3380580+Sintendo@users.noreply.github.com>2025-02-02 12:00:44 +0100
commit352cbc4772378d5048a2d8f80f5b5938f6946c5e (patch)
treeb36a7dcfa1e265c17cee7f0d0e609e271a47875a
parent4a29e0e4f45bd1d6c8bfa2fbed22a0ae82cb29a1 (diff)
JitArm64_Integer: cmp - Subtract shifted 12-bit constant
You can encode a shifted 12-bit immediate in a SUB instruction on ARM64. Constants in this range do not need to be sign extended, so we can exploit this to avoid materializing the immediate. This approach saves an instruction if it does not need to be materialized in a register afterwards. Otherwise, we just materialize it later and the total number of instructions stays the same. Before: 0x52a00099 mov w25, #0x40000 ; =262144 0x93407f7a sxtw x26, w27 0xcb39c35a sub x26, x26, w25, sxtw After: 0x93407f7a sxtw x26, w27 0xd141035a sub x26, x26, #0x40, lsl #12 ; =0x40000
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
index 370ad619c5..3a56e58b84 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
@@ -658,6 +658,11 @@ void JitArm64::cmp(UGeckoInstruction inst)
if (const u32 imm = gpr.GetImm(b); imm != 0)
SUB(CR, CR, imm);
}
+ else if (gpr.IsImm(b) && (gpr.GetImm(b) & 0xFFF000) == gpr.GetImm(b))
+ {
+ SXTW(CR, gpr.R(a));
+ SUB(CR, CR, gpr.GetImm(b) >> 12, true);
+ }
else
{
ARM64Reg RA = gpr.R(a);