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| author | Sintendo <3380580+Sintendo@users.noreply.github.com> | 2025-02-01 22:02:43 +0100 |
|---|---|---|
| committer | Sintendo <3380580+Sintendo@users.noreply.github.com> | 2025-02-02 12:57:59 +0100 |
| commit | 7ce7da629e8059a7c819ea26436f4426648d22b5 (patch) | |
| tree | a0f65a7461a06bb7da6c2e25776784b49ed02c69 | |
| parent | b7c3f91643535b760a71de5b1faaae2b91ac7af2 (diff) | |
JitArm64_Integer: cmpl - Subtract shifted 12-bit constant
You can encode a shifted 12-bit immediate in a SUB instruction on ARM64.
We exploit this to avoid materializing the immediate.
This approach saves an instruction if it does not need to be
materialized in a register afterwards. Otherwise, we just materialize
it later and the total number of instructions stays the same.
Before:
0x52a00218 mov w24, #0x100000 ; =1048576
0xcb180379 sub x25, x27, x24
After:
0xd1440379 sub x25, x27, #0x100, lsl #12 ; =0x100000
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp index ef44a72efd..58fab5cfea 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp @@ -736,6 +736,10 @@ void JitArm64::cmpl(UGeckoInstruction inst) else SUB(CR, EncodeRegTo64(gpr.R(a)), imm); } + else if (gpr.IsImm(b) && (gpr.GetImm(b) & 0xFFF000) == gpr.GetImm(b)) + { + SUB(CR, EncodeRegTo64(gpr.R(a)), gpr.GetImm(b) >> 12, true); + } else { SUB(CR, EncodeRegTo64(gpr.R(a)), EncodeRegTo64(gpr.R(b))); |