Core/DSP: Split extended opcode 0xc0/mask 0xc0 to account for 0xc3/mask 0xc3 variant

In assembly, these are 'ld $ax0.d,$ax1.r,@$arS with their n,m and nm variants,
which have been special cased for S==3. The regular 'ld can be decomposed
into lrri $ax0.d,@$arS and lrri $ax1.r,@$ar3, while the S==3 case decomposes
to lrri $axR.h,@$arD and lrri $axR.l,@$ar3. The latter variant will be
disassembled to 'ldax $axR,@$arD after this change. The assembler recognizes
both the new 'ldax variant and the old 'ld with @$ar3 but the disassembler
only outputs 'ldax. Besides the readability, this allows for more correct
register use analysis(when it's done).


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7413 8ced0084-cf51-0410-be5f-012b33b47a6e

0 files changed, 0 insertions, 0 deletions