From 98752f2a1eef393cacc42e33bb4c66cbfde010ac Mon Sep 17 00:00:00 2001 From: pierre Date: Wed, 29 Dec 2010 20:20:52 +0000 Subject: Core/DSPCore: Changed g_dsp._r back to g_dsp.r. Removed the check*Exclude functions accidentally added. Fixed the jitted ar register arithmetic. Added a CMakeList.txt for the UnitTests, but did not add the subdirectory to Source/CMakeLists.txt. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6687 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/DSPCore/Src/DSPCore.cpp | 88 ++++++++++++++++++------------------- 1 file changed, 44 insertions(+), 44 deletions(-) (limited to 'Source/Core/DSPCore/Src/DSPCore.cpp') diff --git a/Source/Core/DSPCore/Src/DSPCore.cpp b/Source/Core/DSPCore/Src/DSPCore.cpp index 1c16c8aed6..ede578de32 100644 --- a/Source/Core/DSPCore/Src/DSPCore.cpp +++ b/Source/Core/DSPCore/Src/DSPCore.cpp @@ -88,7 +88,7 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename, LoadRom(irom_filename, DSP_IROM_SIZE, g_dsp.irom); LoadRom(coef_filename, DSP_COEF_SIZE, g_dsp.coef); - memset(&g_dsp._r,0,sizeof(g_dsp._r)); + memset(&g_dsp.r,0,sizeof(g_dsp.r)); for (int i = 0; i < 4; i++) { @@ -113,13 +113,13 @@ bool DSPCore_Init(const char *irom_filename, const char *coef_filename, // Copied from a real console after the custom UCode has been loaded. // These are the indexing wrapping registers. - g_dsp._r.wr[0] = 0xffff; - g_dsp._r.wr[1] = 0xffff; - g_dsp._r.wr[2] = 0xffff; - g_dsp._r.wr[3] = 0xffff; + g_dsp.r.wr[0] = 0xffff; + g_dsp.r.wr[1] = 0xffff; + g_dsp.r.wr[2] = 0xffff; + g_dsp.r.wr[3] = 0xffff; - g_dsp._r.sr |= SR_INT_ENABLE; - g_dsp._r.sr |= SR_EXT_INT_ENABLE; + g_dsp.r.sr |= SR_INT_ENABLE; + g_dsp.r.sr |= SR_EXT_INT_ENABLE; g_dsp.cr = 0x804; gdsp_ifx_init(); @@ -159,10 +159,10 @@ void DSPCore_Reset() { g_dsp.pc = DSP_RESET_VECTOR; - g_dsp._r.wr[0] = 0xffff; - g_dsp._r.wr[1] = 0xffff; - g_dsp._r.wr[2] = 0xffff; - g_dsp._r.wr[3] = 0xffff; + g_dsp.r.wr[0] = 0xffff; + g_dsp.r.wr[1] = 0xffff; + g_dsp.r.wr[2] = 0xffff; + g_dsp.r.wr[3] = 0xffff; } @@ -201,14 +201,14 @@ void DSPCore_CheckExceptions() // store pc and sr until RTI dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc); - dsp_reg_store_stack(DSP_STACK_D, g_dsp._r.sr); + dsp_reg_store_stack(DSP_STACK_D, g_dsp.r.sr); g_dsp.pc = i * 2; g_dsp.exceptions &= ~(1 << i); if (i == 7) - g_dsp._r.sr &= ~SR_EXT_INT_ENABLE; + g_dsp.r.sr &= ~SR_EXT_INT_ENABLE; else - g_dsp._r.sr &= ~SR_INT_ENABLE; + g_dsp.r.sr &= ~SR_INT_ENABLE; break; } else { #if defined(_DEBUG) || defined(DEBUGFAST) @@ -299,43 +299,43 @@ u16 DSPCore_ReadRegister(int reg) { case DSP_REG_AR1: case DSP_REG_AR2: case DSP_REG_AR3: - return g_dsp._r.ar[reg - DSP_REG_AR0]; + return g_dsp.r.ar[reg - DSP_REG_AR0]; case DSP_REG_IX0: case DSP_REG_IX1: case DSP_REG_IX2: case DSP_REG_IX3: - return g_dsp._r.ix[reg - DSP_REG_IX0]; + return g_dsp.r.ix[reg - DSP_REG_IX0]; case DSP_REG_WR0: case DSP_REG_WR1: case DSP_REG_WR2: case DSP_REG_WR3: - return g_dsp._r.wr[reg - DSP_REG_WR0]; + return g_dsp.r.wr[reg - DSP_REG_WR0]; case DSP_REG_ST0: case DSP_REG_ST1: case DSP_REG_ST2: case DSP_REG_ST3: - return g_dsp._r.st[reg - DSP_REG_ST0]; + return g_dsp.r.st[reg - DSP_REG_ST0]; case DSP_REG_ACH0: case DSP_REG_ACH1: - return g_dsp._r.ac[reg - DSP_REG_ACH0].h; - case DSP_REG_CR: return g_dsp._r.cr; - case DSP_REG_SR: return g_dsp._r.sr; - case DSP_REG_PRODL: return g_dsp._r.prod.l; - case DSP_REG_PRODM: return g_dsp._r.prod.m; - case DSP_REG_PRODH: return g_dsp._r.prod.h; - case DSP_REG_PRODM2: return g_dsp._r.prod.m2; + return g_dsp.r.ac[reg - DSP_REG_ACH0].h; + case DSP_REG_CR: return g_dsp.r.cr; + case DSP_REG_SR: return g_dsp.r.sr; + case DSP_REG_PRODL: return g_dsp.r.prod.l; + case DSP_REG_PRODM: return g_dsp.r.prod.m; + case DSP_REG_PRODH: return g_dsp.r.prod.h; + case DSP_REG_PRODM2: return g_dsp.r.prod.m2; case DSP_REG_AXL0: case DSP_REG_AXL1: - return g_dsp._r.ax[reg - DSP_REG_AXL0].l; + return g_dsp.r.ax[reg - DSP_REG_AXL0].l; case DSP_REG_AXH0: case DSP_REG_AXH1: - return g_dsp._r.ax[reg - DSP_REG_AXH0].h; + return g_dsp.r.ax[reg - DSP_REG_AXH0].h; case DSP_REG_ACL0: case DSP_REG_ACL1: - return g_dsp._r.ac[reg - DSP_REG_ACL0].l; + return g_dsp.r.ac[reg - DSP_REG_ACL0].l; case DSP_REG_ACM0: case DSP_REG_ACM1: - return g_dsp._r.ac[reg - DSP_REG_ACM0].m; + return g_dsp.r.ac[reg - DSP_REG_ACM0].m; default: _assert_msg_(DSP_CORE, 0, "cannot happen"); return 0; @@ -348,51 +348,51 @@ void DSPCore_WriteRegister(int reg, u16 val) { case DSP_REG_AR1: case DSP_REG_AR2: case DSP_REG_AR3: - g_dsp._r.ar[reg - DSP_REG_AR0] = val; + g_dsp.r.ar[reg - DSP_REG_AR0] = val; break; case DSP_REG_IX0: case DSP_REG_IX1: case DSP_REG_IX2: case DSP_REG_IX3: - g_dsp._r.ix[reg - DSP_REG_IX0] = val; + g_dsp.r.ix[reg - DSP_REG_IX0] = val; break; case DSP_REG_WR0: case DSP_REG_WR1: case DSP_REG_WR2: case DSP_REG_WR3: - g_dsp._r.wr[reg - DSP_REG_WR0] = val; + g_dsp.r.wr[reg - DSP_REG_WR0] = val; break; case DSP_REG_ST0: case DSP_REG_ST1: case DSP_REG_ST2: case DSP_REG_ST3: - g_dsp._r.st[reg - DSP_REG_ST0] = val; + g_dsp.r.st[reg - DSP_REG_ST0] = val; break; case DSP_REG_ACH0: case DSP_REG_ACH1: - g_dsp._r.ac[reg - DSP_REG_ACH0].h = val; + g_dsp.r.ac[reg - DSP_REG_ACH0].h = val; break; - case DSP_REG_CR: g_dsp._r.cr = val; break; - case DSP_REG_SR: g_dsp._r.sr = val; break; - case DSP_REG_PRODL: g_dsp._r.prod.l = val; break; - case DSP_REG_PRODM: g_dsp._r.prod.m = val; break; - case DSP_REG_PRODH: g_dsp._r.prod.h = val; break; - case DSP_REG_PRODM2: g_dsp._r.prod.m2 = val; break; + case DSP_REG_CR: g_dsp.r.cr = val; break; + case DSP_REG_SR: g_dsp.r.sr = val; break; + case DSP_REG_PRODL: g_dsp.r.prod.l = val; break; + case DSP_REG_PRODM: g_dsp.r.prod.m = val; break; + case DSP_REG_PRODH: g_dsp.r.prod.h = val; break; + case DSP_REG_PRODM2: g_dsp.r.prod.m2 = val; break; case DSP_REG_AXL0: case DSP_REG_AXL1: - g_dsp._r.ax[reg - DSP_REG_AXL0].l = val; + g_dsp.r.ax[reg - DSP_REG_AXL0].l = val; break; case DSP_REG_AXH0: case DSP_REG_AXH1: - g_dsp._r.ax[reg - DSP_REG_AXH0].h = val; + g_dsp.r.ax[reg - DSP_REG_AXH0].h = val; break; case DSP_REG_ACL0: case DSP_REG_ACL1: - g_dsp._r.ac[reg - DSP_REG_ACL0].l = val; + g_dsp.r.ac[reg - DSP_REG_ACL0].l = val; break; case DSP_REG_ACM0: case DSP_REG_ACM1: - g_dsp._r.ac[reg - DSP_REG_ACM0].m = val; + g_dsp.r.ac[reg - DSP_REG_ACM0].m = val; break; } } -- cgit v1.2.3