From c4dda436c69596644178f3b32e15ebdcc24629e6 Mon Sep 17 00:00:00 2001 From: nakeee Date: Fri, 14 Aug 2009 10:40:35 +0000 Subject: DSPLLE: fixed 0x20 handling, we still don't know what it is good for though:( git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3980 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/DSPCore/Src/DSPIntCCUtil.cpp | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'Source/Core/DSPCore/Src/DSPIntCCUtil.cpp') diff --git a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp index bdbf8c0584..9b78a11ab6 100644 --- a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp +++ b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp @@ -28,6 +28,7 @@ namespace DSPInterpreter { void Update_SR_Register64(s64 _Value) { + // TODO: Should also set 0x10 and 0x01 g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK; if (_Value < 0) @@ -40,17 +41,20 @@ void Update_SR_Register64(s64 _Value) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO; } - // weird - if ((_Value >> 62) == 0) + // Checks if top bits are equal, what is it good for? + if ((_Value >> 62) == 0 || _Value >> 62 == 3) { - g_dsp.r[DSP_REG_SR] |= 0x20; + g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; } } + void Update_SR_Register16(s16 _Value) { g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK; + // Only sets those 3 bits + if (_Value < 0) { g_dsp.r[DSP_REG_SR] |= SR_SIGN; @@ -61,10 +65,10 @@ void Update_SR_Register16(s16 _Value) g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO; } - // weird - if ((_Value >> 14) == 0) + // Checks if top bits are equal, what is it good for? + if ((_Value >> 14) == 0 || _Value >> 14 == 3) { - g_dsp.r[DSP_REG_SR] |= 0x20; + g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; } } -- cgit v1.2.3