From e0e5a25bcd973028b5d62f3336d21bcfe63d6759 Mon Sep 17 00:00:00 2001 From: Shawn Hoffman Date: Wed, 17 Feb 2010 02:33:21 +0000 Subject: Update_SR_Register64 sets SR_TOP2BITS based on m, not h (does someone have tests saying otherwise?) clean up dsp_base.inc a little, use some irom funcs where possible git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5069 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/DSPCore/Src/DSPIntCCUtil.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'Source/Core/DSPCore/Src/DSPIntCCUtil.cpp') diff --git a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp index 2bf5192b2a..d9c04578b4 100644 --- a/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp +++ b/Source/Core/DSPCore/Src/DSPIntCCUtil.cpp @@ -51,9 +51,9 @@ void Update_SR_Register64(s64 _Value, bool carry, bool overflow) g_dsp.r[DSP_REG_SR] |= SR_OVERFLOW; } - // Checks if top bits are equal, what is it good for? - if (((_Value >> 62) == 0) || (_Value >> 62 == 3)) - { + // Checks if top bits of m are equal, what is it good for? + if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000)) + { g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS; } } -- cgit v1.2.3