From 1d23c2ca8bfe41549970dc77da7d4b21950e11e6 Mon Sep 17 00:00:00 2001 From: Tony Wasserka Date: Wed, 17 Sep 2014 18:46:23 +0200 Subject: GPU: Only load the relevant color components upon writes to the tev color registers. The other two components need not be valid upon write, hence loading them results in glitches. Fixes issue 6783. --- Source/Core/VideoBackends/Software/BPMemLoader.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'Source/Core/VideoBackends/Software') diff --git a/Source/Core/VideoBackends/Software/BPMemLoader.cpp b/Source/Core/VideoBackends/Software/BPMemLoader.cpp index 990d21e539..f2aa429c49 100644 --- a/Source/Core/VideoBackends/Software/BPMemLoader.cpp +++ b/Source/Core/VideoBackends/Software/BPMemLoader.cpp @@ -145,10 +145,10 @@ void SWBPWritten(int address, int newvalue) } break; - case BPMEM_TEV_REGISTER_L: // Reg 1 - case BPMEM_TEV_REGISTER_L+2: // Reg 2 - case BPMEM_TEV_REGISTER_L+4: // Reg 3 - case BPMEM_TEV_REGISTER_L+6: // Reg 4 + case BPMEM_TEV_COLOR_RA: + case BPMEM_TEV_COLOR_RA + 2: + case BPMEM_TEV_COLOR_RA + 4: + case BPMEM_TEV_COLOR_RA + 6: { int regNum = (address >> 1 ) & 0x3; TevReg& reg = bpmem.tevregs[regNum]; @@ -160,10 +160,10 @@ void SWBPWritten(int address, int newvalue) break; } - case BPMEM_TEV_REGISTER_H: // Reg 1 - case BPMEM_TEV_REGISTER_H+2: // Reg 2 - case BPMEM_TEV_REGISTER_H+4: // Reg 3 - case BPMEM_TEV_REGISTER_H+6: // Reg 4 + case BPMEM_TEV_COLOR_BG: + case BPMEM_TEV_COLOR_BG + 2: + case BPMEM_TEV_COLOR_BG + 4: + case BPMEM_TEV_COLOR_BG + 6: { int regNum = (address >> 1 ) & 0x3; TevReg& reg = bpmem.tevregs[regNum]; -- cgit v1.2.3