From ec8aaf1f3040ed7dedf3c95c53e8101691c03208 Mon Sep 17 00:00:00 2001 From: "Admiral H. Curtiss" Date: Sat, 10 Dec 2022 16:35:07 +0100 Subject: VideoCommon/PixelEngine: Refactor to class, move to Core::System. --- Source/Core/VideoCommon/PixelEngine.cpp | 298 +++++++++----------------------- 1 file changed, 84 insertions(+), 214 deletions(-) (limited to 'Source/Core/VideoCommon/PixelEngine.cpp') diff --git a/Source/Core/VideoCommon/PixelEngine.cpp b/Source/Core/VideoCommon/PixelEngine.cpp index 2684585ca7..cd2b536dba 100644 --- a/Source/Core/VideoCommon/PixelEngine.cpp +++ b/Source/Core/VideoCommon/PixelEngine.cpp @@ -25,188 +25,54 @@ namespace PixelEngine { -// Note: These enums are (assumed to be) identical to the one in BPMemory, but the base type is set -// to u16 instead of u32 for BitField -enum class CompareMode : u16 -{ - Never = 0, - Less = 1, - Equal = 2, - LEqual = 3, - Greater = 4, - NEqual = 5, - GEqual = 6, - Always = 7 -}; - -union UPEZConfReg -{ - u16 hex; - BitField<0, 1, bool, u16> z_comparator_enable; - BitField<1, 3, CompareMode, u16> function; - BitField<4, 1, bool, u16> z_update_enable; -}; - -enum class SrcBlendFactor : u16 -{ - Zero = 0, - One = 1, - DstClr = 2, - InvDstClr = 3, - SrcAlpha = 4, - InvSrcAlpha = 5, - DstAlpha = 6, - InvDstAlpha = 7 -}; - -enum class DstBlendFactor : u16 -{ - Zero = 0, - One = 1, - SrcClr = 2, - InvSrcClr = 3, - SrcAlpha = 4, - InvSrcAlpha = 5, - DstAlpha = 6, - InvDstAlpha = 7 -}; - -enum class LogicOp : u16 -{ - Clear = 0, - And = 1, - AndReverse = 2, - Copy = 3, - AndInverted = 4, - NoOp = 5, - Xor = 6, - Or = 7, - Nor = 8, - Equiv = 9, - Invert = 10, - OrReverse = 11, - CopyInverted = 12, - OrInverted = 13, - Nand = 14, - Set = 15 -}; - -union UPEAlphaConfReg -{ - u16 hex; - BitField<0, 1, bool, u16> blend; // Set for GX_BM_BLEND or GX_BM_SUBTRACT - BitField<1, 1, bool, u16> logic; // Set for GX_BM_LOGIC - BitField<2, 1, bool, u16> dither; - BitField<3, 1, bool, u16> color_update_enable; - BitField<4, 1, bool, u16> alpha_update_enable; - BitField<5, 3, DstBlendFactor, u16> dst_factor; - BitField<8, 3, SrcBlendFactor, u16> src_factor; - BitField<11, 1, bool, u16> subtract; // Set for GX_BM_SUBTRACT - BitField<12, 4, LogicOp, u16> logic_op; -}; - -union UPEDstAlphaConfReg -{ - u16 hex; - BitField<0, 8, u8, u16> alpha; - BitField<8, 1, bool, u16> enable; -}; - -union UPEAlphaModeConfReg -{ - u16 hex; - BitField<0, 8, u8, u16> threshold; - // Yagcd and libogc use 8 bits for this, but the enum only needs 3 - BitField<8, 3, CompareMode, u16> compare_mode; -}; - -union UPEAlphaReadReg +enum { - u16 hex; - BitField<0, 2, AlphaReadMode, u16> read_mode; + INT_CAUSE_PE_TOKEN = 0x200, // GP Token + INT_CAUSE_PE_FINISH = 0x400, // GP Finished }; -// fifo Control Register -union UPECtrlReg +void PixelEngineManager::DoState(PointerWrap& p) { - u16 hex; - BitField<0, 1, bool, u16> pe_token_enable; - BitField<1, 1, bool, u16> pe_finish_enable; - BitField<2, 1, bool, u16> pe_token; // Write only - BitField<3, 1, bool, u16> pe_finish; // Write only -}; - -// STATE_TO_SAVE -static UPEZConfReg m_ZConf; -static UPEAlphaConfReg m_AlphaConf; -static UPEDstAlphaConfReg m_DstAlphaConf; -static UPEAlphaModeConfReg m_AlphaModeConf; -static UPEAlphaReadReg m_AlphaRead; -static UPECtrlReg m_Control; + p.Do(m_z_conf); + p.Do(m_alpha_conf); + p.Do(m_dst_alpha_conf); + p.Do(m_alpha_mode_conf); + p.Do(m_alpha_read); + p.Do(m_control); -static std::mutex s_token_finish_mutex; -static u16 s_token; -static u16 s_token_pending; -static bool s_token_interrupt_pending; -static bool s_finish_interrupt_pending; -static bool s_event_raised; + p.Do(m_token); + p.Do(m_token_pending); + p.Do(m_token_interrupt_pending); + p.Do(m_finish_interrupt_pending); + p.Do(m_event_raised); -static bool s_signal_token_interrupt; -static bool s_signal_finish_interrupt; - -static CoreTiming::EventType* et_SetTokenFinishOnMainThread; + p.Do(m_signal_token_interrupt); + p.Do(m_signal_finish_interrupt); +} -enum +void PixelEngineManager::Init() { - INT_CAUSE_PE_TOKEN = 0x200, // GP Token - INT_CAUSE_PE_FINISH = 0x400, // GP Finished -}; + m_control.hex = 0; + m_z_conf.hex = 0; + m_alpha_conf.hex = 0; + m_dst_alpha_conf.hex = 0; + m_alpha_mode_conf.hex = 0; + m_alpha_read.hex = 0; -void DoState(PointerWrap& p) -{ - p.Do(m_ZConf); - p.Do(m_AlphaConf); - p.Do(m_DstAlphaConf); - p.Do(m_AlphaModeConf); - p.Do(m_AlphaRead); - p.Do(m_Control); - - p.Do(s_token); - p.Do(s_token_pending); - p.Do(s_token_interrupt_pending); - p.Do(s_finish_interrupt_pending); - p.Do(s_event_raised); - - p.Do(s_signal_token_interrupt); - p.Do(s_signal_finish_interrupt); -} + m_token = 0; + m_token_pending = 0; + m_token_interrupt_pending = false; + m_finish_interrupt_pending = false; + m_event_raised = false; -static void UpdateInterrupts(); -static void SetTokenFinish_OnMainThread(Core::System& system, u64 userdata, s64 cyclesLate); + m_signal_token_interrupt = false; + m_signal_finish_interrupt = false; -void Init() -{ - m_Control.hex = 0; - m_ZConf.hex = 0; - m_AlphaConf.hex = 0; - m_DstAlphaConf.hex = 0; - m_AlphaModeConf.hex = 0; - m_AlphaRead.hex = 0; - - s_token = 0; - s_token_pending = 0; - s_token_interrupt_pending = false; - s_finish_interrupt_pending = false; - s_event_raised = false; - - s_signal_token_interrupt = false; - s_signal_finish_interrupt = false; - - et_SetTokenFinishOnMainThread = Core::System::GetInstance().GetCoreTiming().RegisterEvent( - "SetTokenFinish", SetTokenFinish_OnMainThread); + m_event_type_set_token_finish = Core::System::GetInstance().GetCoreTiming().RegisterEvent( + "SetTokenFinish", SetTokenFinish_OnMainThread_Static); } -void RegisterMMIO(MMIO::Mapping* mmio, u32 base) +void PixelEngineManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base) { // Directly mapped registers. struct @@ -214,11 +80,11 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base) u32 addr; u16* ptr; } directly_mapped_vars[] = { - {PE_ZCONF, &m_ZConf.hex}, - {PE_ALPHACONF, &m_AlphaConf.hex}, - {PE_DSTALPHACONF, &m_DstAlphaConf.hex}, - {PE_ALPHAMODE, &m_AlphaModeConf.hex}, - {PE_ALPHAREAD, &m_AlphaRead.hex}, + {PE_ZCONF, &m_z_conf.hex}, + {PE_ALPHACONF, &m_alpha_conf.hex}, + {PE_DSTALPHACONF, &m_dst_alpha_conf.hex}, + {PE_ALPHAMODE, &m_alpha_mode_conf.hex}, + {PE_ALPHAREAD, &m_alpha_read.hex}, }; for (auto& mapped_var : directly_mapped_vars) { @@ -253,27 +119,29 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base) } // Control register - mmio->Register(base | PE_CTRL_REGISTER, MMIO::DirectRead(&m_Control.hex), - MMIO::ComplexWrite([](Core::System&, u32, u16 val) { + mmio->Register(base | PE_CTRL_REGISTER, MMIO::DirectRead(&m_control.hex), + MMIO::ComplexWrite([](Core::System& system, u32, u16 val) { + auto& pe = system.GetPixelEngine(); + UPECtrlReg tmpCtrl{.hex = val}; if (tmpCtrl.pe_token) - s_signal_token_interrupt = false; + pe.m_signal_token_interrupt = false; if (tmpCtrl.pe_finish) - s_signal_finish_interrupt = false; + pe.m_signal_finish_interrupt = false; - m_Control.pe_token_enable = tmpCtrl.pe_token_enable.Value(); - m_Control.pe_finish_enable = tmpCtrl.pe_finish_enable.Value(); - m_Control.pe_token = false; // this flag is write only - m_Control.pe_finish = false; // this flag is write only + pe.m_control.pe_token_enable = tmpCtrl.pe_token_enable.Value(); + pe.m_control.pe_finish_enable = tmpCtrl.pe_finish_enable.Value(); + pe.m_control.pe_token = false; // this flag is write only + pe.m_control.pe_finish = false; // this flag is write only DEBUG_LOG_FMT(PIXELENGINE, "(w16) CTRL_REGISTER: {:#06x}", val); - UpdateInterrupts(); + pe.UpdateInterrupts(); })); // Token register, readonly. - mmio->Register(base | PE_TOKEN_REG, MMIO::DirectRead(&s_token), MMIO::InvalidWrite()); + mmio->Register(base | PE_TOKEN_REG, MMIO::DirectRead(&m_token), MMIO::InvalidWrite()); // BBOX registers, readonly and need to update a flag. for (int i = 0; i < 4; ++i) @@ -286,35 +154,42 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base) } } -static void UpdateInterrupts() +void PixelEngineManager::UpdateInterrupts() { // check if there is a token-interrupt ProcessorInterface::SetInterrupt(INT_CAUSE_PE_TOKEN, - s_signal_token_interrupt && m_Control.pe_token_enable); + m_signal_token_interrupt && m_control.pe_token_enable); // check if there is a finish-interrupt ProcessorInterface::SetInterrupt(INT_CAUSE_PE_FINISH, - s_signal_finish_interrupt && m_Control.pe_finish_enable); + m_signal_finish_interrupt && m_control.pe_finish_enable); } -static void SetTokenFinish_OnMainThread(Core::System& system, u64 userdata, s64 cyclesLate) +void PixelEngineManager::SetTokenFinish_OnMainThread_Static(Core::System& system, u64 userdata, + s64 cycles_late) { - std::unique_lock lk(s_token_finish_mutex); - s_event_raised = false; + system.GetPixelEngine().SetTokenFinish_OnMainThread(system, userdata, cycles_late); +} - s_token = s_token_pending; +void PixelEngineManager::SetTokenFinish_OnMainThread(Core::System& system, u64 userdata, + s64 cycles_late) +{ + std::unique_lock lk(m_token_finish_mutex); + m_event_raised = false; + + m_token = m_token_pending; - if (s_token_interrupt_pending) + if (m_token_interrupt_pending) { - s_token_interrupt_pending = false; - s_signal_token_interrupt = true; + m_token_interrupt_pending = false; + m_signal_token_interrupt = true; UpdateInterrupts(); } - if (s_finish_interrupt_pending) + if (m_finish_interrupt_pending) { - s_finish_interrupt_pending = false; - s_signal_finish_interrupt = true; + m_finish_interrupt_pending = false; + m_signal_finish_interrupt = true; UpdateInterrupts(); lk.unlock(); Core::FrameUpdateOnCPUThread(); @@ -322,14 +197,14 @@ static void SetTokenFinish_OnMainThread(Core::System& system, u64 userdata, s64 } // Raise the event handler above on the CPU thread. -// s_token_finish_mutex must be locked. +// m_token_finish_mutex must be locked. // THIS IS EXECUTED FROM VIDEO THREAD -static void RaiseEvent(int cycles_into_future) +void PixelEngineManager::RaiseEvent(int cycles_into_future) { - if (s_event_raised) + if (m_event_raised) return; - s_event_raised = true; + m_event_raised = true; CoreTiming::FromThread from = CoreTiming::FromThread::NON_CPU; s64 cycles = 0; // we don't care about timings for dual core mode. @@ -342,40 +217,35 @@ static void RaiseEvent(int cycles_into_future) // games time to setup any interrupt state cycles = std::max(500, cycles_into_future); } - Core::System::GetInstance().GetCoreTiming().ScheduleEvent(cycles, et_SetTokenFinishOnMainThread, + Core::System::GetInstance().GetCoreTiming().ScheduleEvent(cycles, m_event_type_set_token_finish, 0, from); } // SetToken // THIS IS EXECUTED FROM VIDEO THREAD -void SetToken(const u16 token, const bool interrupt, int cycles_into_future) +void PixelEngineManager::SetToken(const u16 token, const bool interrupt, int cycles_into_future) { DEBUG_LOG_FMT(PIXELENGINE, "VIDEO Backend raises INT_CAUSE_PE_TOKEN (btw, token: {:04x})", token); - std::lock_guard lk(s_token_finish_mutex); + std::lock_guard lk(m_token_finish_mutex); - s_token_pending = token; - s_token_interrupt_pending |= interrupt; + m_token_pending = token; + m_token_interrupt_pending |= interrupt; RaiseEvent(cycles_into_future); } // SetFinish // THIS IS EXECUTED FROM VIDEO THREAD (BPStructs.cpp) when a new frame has been drawn -void SetFinish(int cycles_into_future) +void PixelEngineManager::SetFinish(int cycles_into_future) { DEBUG_LOG_FMT(PIXELENGINE, "VIDEO Set Finish"); - std::lock_guard lk(s_token_finish_mutex); + std::lock_guard lk(m_token_finish_mutex); - s_finish_interrupt_pending |= true; + m_finish_interrupt_pending |= true; RaiseEvent(cycles_into_future); } -AlphaReadMode GetAlphaReadMode() -{ - return m_AlphaRead.read_mode; -} - } // namespace PixelEngine -- cgit v1.2.3