Initial repo setup (#1)

* git subrepo clone git@github.com:ethteck/splat.git tools/splat

subrepo:
  subdir:   "tools/splat"
  merged:   "4fec014"
upstream:
  origin:   "git@github.com:ethteck/splat.git"
  branch:   "master"
  commit:   "4fec014"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* gitignore

* decompress_baserom.py

* Initial yaml

* run flib

* more yaml stuff

* Builds an uncompressed ROM

* setup ido download

* git subrepo clone git@github.com:simonlindholm/asm-differ.git tools/asm-differ

subrepo:
  subdir:   "tools/asm-differ"
  merged:   "ae40866"
upstream:
  origin:   "git@github.com:simonlindholm/asm-differ.git"
  branch:   "main"
  commit:   "ae40866"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* git subrepo clone git@github.com:simonlindholm/asm-processor.git tools/asm-processor

subrepo:
  subdir:   "tools/asm-processor"
  merged:   "bbd86ea"
upstream:
  origin:   "git@github.com:simonlindholm/asm-processor.git"
  branch:   "main"
  commit:   "bbd86ea"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* git subrepo clone (merge) git@github.com:EllipticEllipsis/fado.git tools/fado

subrepo:
  subdir:   "tools/fado"
  merged:   "8d896ee"
upstream:
  origin:   "git@github.com:EllipticEllipsis/fado.git"
  branch:   "master"
  commit:   "8d896ee"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* setup ido in makefile

* data and rodata

* add automatic file splits

* bootstrap most symbol_addrs

* git subrepo clone --branch=irix git@github.com:hensldm/ultralib.git lib/ultralib

subrepo:
  subdir:   "lib/ultralib"
  merged:   "0d1e095"
upstream:
  origin:   "git@github.com:hensldm/ultralib.git"
  branch:   "irix"
  commit:   "0d1e095"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* setup ido building

* various tooling

* git subrepo pull tools/asm-differ

subrepo:
  subdir:   "tools/asm-differ"
  merged:   "857b398"
upstream:
  origin:   "git@github.com:simonlindholm/asm-differ.git"
  branch:   "main"
  commit:   "857b398"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* Change defines to match IDO

* review

* newlin

* update gitignore

* Windows error

* D_01000000

* yeet settings.json

* yeet

* git subrepo clone git@github.com:decompals/ultralib.git lib/ultralib

subrepo:
  subdir:   "lib/ultralib"
  merged:   "d03b2a3"
upstream:
  origin:   "git@github.com:decompals/ultralib.git"
  branch:   "main"
  commit:   "d03b2a3"
git-subrepo:
  version:  "0.4.3"
  origin:   "https://github.com/ingydotnet/git-subrepo.git"
  commit:   "2f68596"

* clangformat and clangtidy

* Setup a bunch of headers

* bootstrap boot and code functions and variables headers

* global.h

* update format.py includes

* -D_MIPS_SZLONG=32

* format.py: --verbose

* Update tools/decompress_baserom.py

Co-authored-by: Derek Hensley <hensley.derek58@gmail.com>

* Add libc to global.h

* review

* yeet saved_regs

* yeet headers

* yeet _MSC_VER

* more header cleanup

* add readme licensing note

---------

Co-authored-by: Derek Hensley <hensley.derek58@gmail.com>

1 files changed, 58 insertions, 0 deletions

diff --git a/lib/ultralib/src/libc/bzero.s b/lib/ultralib/src/libc/bzero.s
new file mode 100644
index 0000000..13dcfa2
--- /dev/null
+++ b/lib/ultralib/src/libc/bzero.s
@@ -0,0 +1,58 @@
+#include "PR/R4300.h"
+#include "sys/asm.h"
+#include "sys/regdef.h"
+
+.text
+WEAK(_bzero, bzero)
+WEAK(_blkclr, blkclr)
+LEAF(bzero)
+XLEAF(blkclr)
+    negu v1, a0
+    blt a1, 12, bytezero
+
+    andi v1, v1, 0x3
+    subu a1, a1, v1
+
+    beqz v1, blkzero
+    swl zero, 0(a0)
+    addu a0, a0, v1
+blkzero:
+    and a3, a1, ~31
+    subu a1, a1, a3
+    beqz a3, wordzero
+
+    addu a3, a3, a0
+1:
+    sw zero, 0(a0)
+    sw zero, 4(a0)
+    sw zero, 8(a0)
+    sw zero, 12(a0)
+    addiu a0, a0, 32
+    sw zero, -16(a0)
+    sw zero, -12(a0)
+    sw zero, -8(a0)
+    sw zero, -4(a0)
+    bne a0, a3, 1b
+
+wordzero:
+    and a3, a1, ~3
+    subu a1, a1, a3
+    beqz a3, bytezero
+
+    addu a3, a3, a0
+1:
+    addiu a0, a0, 4
+    sw zero, -4(a0)
+    bne a0, a3, 1b
+
+bytezero:
+    blez a1, zerodone
+    #nop
+    addu a1, a1, a0
+1:
+    addiu a0, a0, 1
+    sb zero, -1(a0)
+    bne a0, a1, 1b
+zerodone:
+    jr ra
+END(bzero)