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| author | Anghelo Carvajal <angheloalf95@gmail.com> | 2023-03-28 23:42:56 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-03-29 03:42:56 +0100 |
| commit | d66a21685f45d130f980e8a5ec7b08cfe189e40b (patch) | |
| tree | f11b3b09dc5772e419fe08d3d0ead4e778def57f /tools/asm-processor/tests/late_rodata_misaligned_doubles.objdump | |
| parent | 6a5e64cc4c26398cc607bb02cdc12a056ddf42d1 (diff) | |
Initial repo setup (#1)
* git subrepo clone git@github.com:ethteck/splat.git tools/splat
subrepo:
subdir: "tools/splat"
merged: "4fec014"
upstream:
origin: "git@github.com:ethteck/splat.git"
branch: "master"
commit: "4fec014"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* gitignore
* decompress_baserom.py
* Initial yaml
* run flib
* more yaml stuff
* Builds an uncompressed ROM
* setup ido download
* git subrepo clone git@github.com:simonlindholm/asm-differ.git tools/asm-differ
subrepo:
subdir: "tools/asm-differ"
merged: "ae40866"
upstream:
origin: "git@github.com:simonlindholm/asm-differ.git"
branch: "main"
commit: "ae40866"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* git subrepo clone git@github.com:simonlindholm/asm-processor.git tools/asm-processor
subrepo:
subdir: "tools/asm-processor"
merged: "bbd86ea"
upstream:
origin: "git@github.com:simonlindholm/asm-processor.git"
branch: "main"
commit: "bbd86ea"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* git subrepo clone (merge) git@github.com:EllipticEllipsis/fado.git tools/fado
subrepo:
subdir: "tools/fado"
merged: "8d896ee"
upstream:
origin: "git@github.com:EllipticEllipsis/fado.git"
branch: "master"
commit: "8d896ee"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* setup ido in makefile
* data and rodata
* add automatic file splits
* bootstrap most symbol_addrs
* git subrepo clone --branch=irix git@github.com:hensldm/ultralib.git lib/ultralib
subrepo:
subdir: "lib/ultralib"
merged: "0d1e095"
upstream:
origin: "git@github.com:hensldm/ultralib.git"
branch: "irix"
commit: "0d1e095"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* setup ido building
* various tooling
* git subrepo pull tools/asm-differ
subrepo:
subdir: "tools/asm-differ"
merged: "857b398"
upstream:
origin: "git@github.com:simonlindholm/asm-differ.git"
branch: "main"
commit: "857b398"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* Change defines to match IDO
* review
* newlin
* update gitignore
* Windows error
* D_01000000
* yeet settings.json
* yeet
* git subrepo clone git@github.com:decompals/ultralib.git lib/ultralib
subrepo:
subdir: "lib/ultralib"
merged: "d03b2a3"
upstream:
origin: "git@github.com:decompals/ultralib.git"
branch: "main"
commit: "d03b2a3"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* clangformat and clangtidy
* Setup a bunch of headers
* bootstrap boot and code functions and variables headers
* global.h
* update format.py includes
* -D_MIPS_SZLONG=32
* format.py: --verbose
* Update tools/decompress_baserom.py
Co-authored-by: Derek Hensley <hensley.derek58@gmail.com>
* Add libc to global.h
* review
* yeet saved_regs
* yeet headers
* yeet _MSC_VER
* more header cleanup
* add readme licensing note
---------
Co-authored-by: Derek Hensley <hensley.derek58@gmail.com>
Diffstat (limited to 'tools/asm-processor/tests/late_rodata_misaligned_doubles.objdump')
| -rw-r--r-- | tools/asm-processor/tests/late_rodata_misaligned_doubles.objdump | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/tools/asm-processor/tests/late_rodata_misaligned_doubles.objdump b/tools/asm-processor/tests/late_rodata_misaligned_doubles.objdump new file mode 100644 index 0000000..cdba84d --- /dev/null +++ b/tools/asm-processor/tests/late_rodata_misaligned_doubles.objdump @@ -0,0 +1,56 @@ + +tests/late_rodata_misaligned_doubles.o: file format elf32-tradbigmips + +SYMBOL TABLE: +00000000 l d .text 00000120 .text +00000000 l d .rodata 00000040 .rodata +00000040 g F .text 0000001c foo +0000009c g F .text 0000001c bar +000000b8 g F .text 0000001c baz +00000000 g F .text 00000040 a +0000005c g F .text 00000040 b +000000d4 g F .text 00000040 c + + +RELOCATION RECORDS FOR [.text]: +OFFSET TYPE VALUE +00000040 R_MIPS_HI16 .rodata +00000048 R_MIPS_LO16 .rodata +0000009c R_MIPS_HI16 .rodata +000000a4 R_MIPS_LO16 .rodata +000000b8 R_MIPS_HI16 .rodata +000000c0 R_MIPS_LO16 .rodata + + +Contents of section .text: + 0000 00000000 00000000 00000000 00000000 ................ + 0010 00000000 00000000 00000000 00000000 ................ + 0020 00000000 00000000 00000000 00000000 ................ + 0030 00000000 00000000 00000000 00000000 ................ + 0040 3c010000 03e00008 d4200010 03e00008 <........ ...... + 0050 00000000 03e00008 00000000 00000000 ................ + 0060 00000000 00000000 00000000 00000000 ................ + 0070 00000000 00000000 00000000 00000000 ................ + 0080 00000000 00000000 00000000 00000000 ................ + 0090 00000000 00000000 00000000 3c010000 ............<... + 00a0 03e00008 d4200028 03e00008 00000000 ..... .(........ + 00b0 03e00008 00000000 3c010000 03e00008 ........<....... + 00c0 c4200030 03e00008 00000000 03e00008 . .0............ + 00d0 00000000 00000000 00000000 00000000 ................ + 00e0 00000000 00000000 00000000 00000000 ................ + 00f0 00000000 00000000 00000000 00000000 ................ + 0100 00000000 00000000 00000000 00000000 ................ + 0110 00000000 00000000 00000000 00000000 ................ +Contents of section .rodata: + 0000 408051ec 00000000 4010147a e147ae14 @.Q.....@..z.G.. + 0010 40101eb8 51eb851f 00000000 408147ae @...Q.......@.G. + 0020 40103333 33333333 40103d70 a3d70a3d @.333333@.=p...= + 0030 40823d71 00000000 401051eb 851eb852 @.=q....@.Q....R +Contents of section .options: + 0000 01200000 00000000 80000002 00000000 . .............. + 0010 000000f3 00000000 00000000 00007ff0 ................ + 0020 07100000 00000000 00000000 00000000 ................ + 0030 08100000 00000000 00000000 00000000 ................ +Contents of section .reginfo: + 0000 80000002 00000000 000000f3 00000000 ................ + 0010 00000000 00007ff0 ........ |