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| author | Anghelo Carvajal <angheloalf95@gmail.com> | 2023-03-28 23:42:56 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-03-29 03:42:56 +0100 |
| commit | d66a21685f45d130f980e8a5ec7b08cfe189e40b (patch) | |
| tree | f11b3b09dc5772e419fe08d3d0ead4e778def57f /tools/asm-processor/tests/test2.objdump | |
| parent | 6a5e64cc4c26398cc607bb02cdc12a056ddf42d1 (diff) | |
Initial repo setup (#1)
* git subrepo clone git@github.com:ethteck/splat.git tools/splat
subrepo:
subdir: "tools/splat"
merged: "4fec014"
upstream:
origin: "git@github.com:ethteck/splat.git"
branch: "master"
commit: "4fec014"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* gitignore
* decompress_baserom.py
* Initial yaml
* run flib
* more yaml stuff
* Builds an uncompressed ROM
* setup ido download
* git subrepo clone git@github.com:simonlindholm/asm-differ.git tools/asm-differ
subrepo:
subdir: "tools/asm-differ"
merged: "ae40866"
upstream:
origin: "git@github.com:simonlindholm/asm-differ.git"
branch: "main"
commit: "ae40866"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* git subrepo clone git@github.com:simonlindholm/asm-processor.git tools/asm-processor
subrepo:
subdir: "tools/asm-processor"
merged: "bbd86ea"
upstream:
origin: "git@github.com:simonlindholm/asm-processor.git"
branch: "main"
commit: "bbd86ea"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* git subrepo clone (merge) git@github.com:EllipticEllipsis/fado.git tools/fado
subrepo:
subdir: "tools/fado"
merged: "8d896ee"
upstream:
origin: "git@github.com:EllipticEllipsis/fado.git"
branch: "master"
commit: "8d896ee"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* setup ido in makefile
* data and rodata
* add automatic file splits
* bootstrap most symbol_addrs
* git subrepo clone --branch=irix git@github.com:hensldm/ultralib.git lib/ultralib
subrepo:
subdir: "lib/ultralib"
merged: "0d1e095"
upstream:
origin: "git@github.com:hensldm/ultralib.git"
branch: "irix"
commit: "0d1e095"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* setup ido building
* various tooling
* git subrepo pull tools/asm-differ
subrepo:
subdir: "tools/asm-differ"
merged: "857b398"
upstream:
origin: "git@github.com:simonlindholm/asm-differ.git"
branch: "main"
commit: "857b398"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* Change defines to match IDO
* review
* newlin
* update gitignore
* Windows error
* D_01000000
* yeet settings.json
* yeet
* git subrepo clone git@github.com:decompals/ultralib.git lib/ultralib
subrepo:
subdir: "lib/ultralib"
merged: "d03b2a3"
upstream:
origin: "git@github.com:decompals/ultralib.git"
branch: "main"
commit: "d03b2a3"
git-subrepo:
version: "0.4.3"
origin: "https://github.com/ingydotnet/git-subrepo.git"
commit: "2f68596"
* clangformat and clangtidy
* Setup a bunch of headers
* bootstrap boot and code functions and variables headers
* global.h
* update format.py includes
* -D_MIPS_SZLONG=32
* format.py: --verbose
* Update tools/decompress_baserom.py
Co-authored-by: Derek Hensley <hensley.derek58@gmail.com>
* Add libc to global.h
* review
* yeet saved_regs
* yeet headers
* yeet _MSC_VER
* more header cleanup
* add readme licensing note
---------
Co-authored-by: Derek Hensley <hensley.derek58@gmail.com>
Diffstat (limited to 'tools/asm-processor/tests/test2.objdump')
| -rw-r--r-- | tools/asm-processor/tests/test2.objdump | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/tools/asm-processor/tests/test2.objdump b/tools/asm-processor/tests/test2.objdump new file mode 100644 index 0000000..276ed9f --- /dev/null +++ b/tools/asm-processor/tests/test2.objdump @@ -0,0 +1,76 @@ + +tests/test2.o: file format elf32-tradbigmips + +SYMBOL TABLE: +00000000 l d .text 000000f0 .text +00000000 l d .rodata 00000060 .rodata +00000000 g O .rodata 00000001 buf1 +00000000 g F .text 0000001c func1 +0000000c g O .rodata 00000001 buf2 +0000001c g F .text 00000028 func2 +00000010 g O .rodata 00000001 buf3 +00000044 g F .text 0000007c func3 +000000c4 g F .text 00000000 jumptarget +000000c0 g F .text 0000000c func4 +0000004c g .rodata 00000000 rv + + +RELOCATION RECORDS FOR [.text]: +OFFSET TYPE VALUE +00000000 R_MIPS_HI16 .rodata +00000008 R_MIPS_LO16 .rodata +0000001c R_MIPS_HI16 .rodata +00000020 R_MIPS_LO16 .rodata +00000028 R_MIPS_HI16 .rodata +0000002c R_MIPS_LO16 .rodata +00000054 R_MIPS_HI16 .rodata +0000005c R_MIPS_LO16 .rodata +000000c0 R_MIPS_HI16 rv +000000c8 R_MIPS_LO16 rv + + +RELOCATION RECORDS FOR [.rodata]: +OFFSET TYPE VALUE +0000002c R_MIPS_32 .text +00000030 R_MIPS_32 .text +00000034 R_MIPS_32 .text +00000038 R_MIPS_32 .text +0000003c R_MIPS_32 .text +00000040 R_MIPS_32 .text +00000044 R_MIPS_32 .text +00000048 R_MIPS_32 .text +0000001c R_MIPS_32 jumptarget +00000050 R_MIPS_32 jumptarget + + +Contents of section .text: + 0000 3c010000 03e00008 c4200020 03e00008 <........ . .... + 0010 00000000 03e00008 00000000 3c010000 ............<... + 0020 c4240024 e4040000 3c010000 c4260028 .$.$....<....&.( + 0030 e4060000 03e00008 00000000 03e00008 ................ + 0040 00000000 2c810008 10200017 00000000 ....,.... ...... + 0050 00047080 3c010000 002e0821 8c2e002c ..p.<......!..., + 0060 01c00008 00000000 03e00008 24020001 ............$... + 0070 03e00008 24020002 03e00008 24020003 ....$.......$... + 0080 03e00008 24020004 03e00008 24020005 ....$.......$... + 0090 03e00008 24020004 03e00008 24020004 ....$.......$... + 00a0 03e00008 24020004 03e00008 24020003 ....$.......$... + 00b0 03e00008 00000000 03e00008 00000000 ................ + 00c0 3c010000 03e00008 c4200000 03e00008 <........ ...... + 00d0 00000000 03e00008 00000000 03e00008 ................ + 00e0 00000000 03e00008 00000000 00000000 ................ +Contents of section .rodata: + 0000 01000000 66756e63 31000000 02000000 ....func1....... + 0010 03000000 66756e63 34000000 00000004 ....func4....... + 0020 3dcccccd c0651234 c0651235 00000068 =....e.4.e.5...h + 0030 00000070 00000078 00000080 00000088 ...p...x........ + 0040 00000090 00000098 000000a0 3e4ccccd ............>L.. + 0050 00000008 00000000 00000000 00000000 ................ +Contents of section .options: + 0000 01200000 00000000 80004016 00000000 . ........@..... + 0010 00000051 00000000 00000000 00007ff0 ...Q............ + 0020 07100000 00000000 00000000 00000000 ................ + 0030 08100000 00000000 00000000 00000000 ................ +Contents of section .reginfo: + 0000 80004016 00000000 00000051 00000000 ..@........Q.... + 0010 00000000 00007ff0 ........ |