diff options
| author | JosJuice <josjuice@gmail.com> | 2024-03-23 14:30:00 +0100 |
|---|---|---|
| committer | JosJuice <josjuice@gmail.com> | 2024-03-23 14:30:00 +0100 |
| commit | 9f0a7c987522d89ffa503ed04a00205fb10d035d (patch) | |
| tree | bf18d063b2802dad390ccf69e04ada7f84bbc3c6 | |
| parent | 3948ac9513b31122e031269c912b206c8389eda4 (diff) | |
JitArm64: Skip SXTW in ComputeRC0(u64)
MOVI2R can set the upper bits to ones for free by using MOVN instead of
MOVZ.
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/Jit.h | 2 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp | 6 |
2 files changed, 3 insertions, 5 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h index ad9c7e4672..6d0ded667a 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.h +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h @@ -351,7 +351,7 @@ protected: void UpdateRoundingMode(); void ComputeRC0(Arm64Gen::ARM64Reg reg); - void ComputeRC0(u64 imm); + void ComputeRC0(u32 imm); void ComputeCarry(Arm64Gen::ARM64Reg reg); // reg must contain 0 or 1 void ComputeCarry(bool carry); void ComputeCarry(); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp index 43c90c9827..0c002bac66 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp @@ -37,12 +37,10 @@ void JitArm64::ComputeRC0(ARM64Reg reg) SXTW(gpr.CR(0), reg); } -void JitArm64::ComputeRC0(u64 imm) +void JitArm64::ComputeRC0(u32 imm) { gpr.BindCRToRegister(0, false); - MOVI2R(gpr.CR(0), imm); - if (imm & 0x80000000) - SXTW(gpr.CR(0), EncodeRegTo32(gpr.CR(0))); + MOVI2R(gpr.CR(0), s64(s32(imm))); } void JitArm64::ComputeCarry(ARM64Reg reg) |