Merge pull request #3195 from lioncash/android

Arm64Emitter: Minor changes

2 files changed, 27 insertions, 24 deletions

diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp
index 16031372f4..6546686716 100644
--- a/Source/Core/Common/Arm64Emitter.cpp
+++ b/Source/Core/Common/Arm64Emitter.cpp
@@ -3,6 +3,7 @@
 // Refer to the license.txt file included.
 
 #include <algorithm>
+#include <cstring>
 #include <vector>
 
 #include "Common/Arm64Emitter.h"
@@ -312,6 +313,12 @@ const u8* ARM64XEmitter::AlignCodePage()
 	return m_code;
 }
 
+void ARM64XEmitter::Write32(u32 value)
+{
+	std::memcpy(m_code, &value, sizeof(u32));
+	m_code += sizeof(u32);
+}
+
 void ARM64XEmitter::FlushIcache()
 {
 	FlushIcacheSection(m_lastCacheFlushEnd, m_code);
@@ -815,32 +822,32 @@ void ARM64XEmitter::EncodeLoadStoreUnscaled(u32 size, u32 op, ARM64Reg Rt, ARM64
 	Write32((size << 30) | (0b111 << 27) | (op << 22) | ((imm & 0x1FF) << 12) | (Rn << 5) | Rt);
 }
 
-static inline bool IsInRangeImm19(s64 distance)
+static constexpr bool IsInRangeImm19(s64 distance)
 {
 	return (distance >= -0x40000 && distance <= 0x3FFFF);
 }
 
-static inline bool IsInRangeImm14(s64 distance)
+static constexpr bool IsInRangeImm14(s64 distance)
 {
 	return (distance >= -0x2000 && distance <= 0x1FFF);
 }
 
-static inline bool IsInRangeImm26(s64 distance)
+static constexpr bool IsInRangeImm26(s64 distance)
 {
 	return (distance >= -0x2000000 && distance <= 0x1FFFFFF);
 }
 
-static inline u32 MaskImm19(s64 distance)
+static constexpr u32 MaskImm19(s64 distance)
 {
 	return distance & 0x7FFFF;
 }
 
-static inline u32 MaskImm14(s64 distance)
+static constexpr u32 MaskImm14(s64 distance)
 {
 	return distance & 0x3FFF;
 }
 
-static inline u32 MaskImm26(s64 distance)
+static constexpr u32 MaskImm26(s64 distance)
 {
 	return distance & 0x3FFFFFF;
 }
diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h
index 3cb5dfe0a8..400a87a624 100644
--- a/Source/Core/Common/Arm64Emitter.h
+++ b/Source/Core/Common/Arm64Emitter.h
@@ -81,19 +81,19 @@ enum ARM64Reg
 	INVALID_REG = 0xFFFFFFFF
 };
 
-inline bool Is64Bit(ARM64Reg reg) { return (reg & 0x20) != 0; }
-inline bool IsSingle(ARM64Reg reg) { return (reg & 0xC0) == 0x40; }
-inline bool IsDouble(ARM64Reg reg) { return (reg & 0xC0) == 0x80; }
-inline bool IsScalar(ARM64Reg reg) { return IsSingle(reg) || IsDouble(reg); }
-inline bool IsQuad(ARM64Reg reg) { return (reg & 0xC0) == 0xC0; }
-inline bool IsVector(ARM64Reg reg) { return (reg & 0xC0) != 0; }
-inline bool IsGPR(ARM64Reg reg) { return (int)reg < 0x40; }
-
-inline ARM64Reg DecodeReg(ARM64Reg reg) { return (ARM64Reg)(reg & 0x1F); }
-inline ARM64Reg EncodeRegTo64(ARM64Reg reg) { return (ARM64Reg)(reg | 0x20); }
-inline ARM64Reg EncodeRegToSingle(ARM64Reg reg) { return (ARM64Reg)(DecodeReg(reg) + S0); }
-inline ARM64Reg EncodeRegToDouble(ARM64Reg reg) { return (ARM64Reg)((reg & ~0xC0) | 0x80); }
-inline ARM64Reg EncodeRegToQuad(ARM64Reg reg) { return (ARM64Reg)(reg | 0xC0); }
+constexpr bool Is64Bit(ARM64Reg reg)  { return (reg & 0x20) != 0; }
+constexpr bool IsSingle(ARM64Reg reg) { return (reg & 0xC0) == 0x40; }
+constexpr bool IsDouble(ARM64Reg reg) { return (reg & 0xC0) == 0x80; }
+constexpr bool IsScalar(ARM64Reg reg) { return IsSingle(reg) || IsDouble(reg); }
+constexpr bool IsQuad(ARM64Reg reg)   { return (reg & 0xC0) == 0xC0; }
+constexpr bool IsVector(ARM64Reg reg) { return (reg & 0xC0) != 0; }
+constexpr bool IsGPR(ARM64Reg reg)    { return static_cast<int>(reg) < 0x40; }
+
+constexpr ARM64Reg DecodeReg(ARM64Reg reg)         { return static_cast<ARM64Reg>(reg & 0x1F); }
+constexpr ARM64Reg EncodeRegTo64(ARM64Reg reg)     { return static_cast<ARM64Reg>(reg | 0x20); }
+constexpr ARM64Reg EncodeRegToSingle(ARM64Reg reg) { return static_cast<ARM64Reg>(DecodeReg(reg) + S0); }
+constexpr ARM64Reg EncodeRegToDouble(ARM64Reg reg) { return static_cast<ARM64Reg>((reg & ~0xC0) | 0x80); }
+constexpr ARM64Reg EncodeRegToQuad(ARM64Reg reg)   { return static_cast<ARM64Reg>(reg | 0xC0); }
 
 // For AND/TST/ORR/EOR etc
 bool IsImmLogical(uint64_t value, unsigned int width, unsigned int *n, unsigned int *imm_s, unsigned int *imm_r);
@@ -359,11 +359,7 @@ private:
 	void EncodeLoadStoreUnscaled(u32 size, u32 op, ARM64Reg Rt, ARM64Reg Rn, s32 imm);
 
 protected:
-	inline void Write32(u32 value)
-	{
-		*(u32*)m_code = value;
-		m_code += 4;
-	}
+	void Write32(u32 value);
 
 public:
 	ARM64XEmitter()