Merge pull request #5159 from ligfx/arm64warnings

Arm64: a slew of warning fixes

1 files changed, 52 insertions, 44 deletions

diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp
index 637f7d06c2..6453f29e05 100644
--- a/Source/Core/Common/Arm64Emitter.cpp
+++ b/Source/Core/Common/Arm64Emitter.cpp
@@ -4,6 +4,7 @@
 
 #include <algorithm>
 #include <array>
+#include <cinttypes>
 #include <cstring>
 #include <vector>
 
@@ -480,13 +481,13 @@ void ARM64XEmitter::EncodeCompareBranchInst(u32 op, ARM64Reg Rt, const void* ptr
   bool b64Bit = Is64Bit(Rt);
   s64 distance = (s64)ptr - (s64)m_code;
 
-  _assert_msg_(DYNA_REC, !(distance & 0x3), "%s: distance must be a multiple of 4: %lx",
+  _assert_msg_(DYNA_REC, !(distance & 0x3), "%s: distance must be a multiple of 4: %" PRIx64,
                __FUNCTION__, distance);
 
   distance >>= 2;
 
   _assert_msg_(DYNA_REC, distance >= -0x40000 && distance <= 0x3FFFF,
-               "%s: Received too large distance: %lx", __FUNCTION__, distance);
+               "%s: Received too large distance: %" PRIx64, __FUNCTION__, distance);
 
   Rt = DecodeReg(Rt);
   Write32((b64Bit << 31) | (0x34 << 24) | (op << 24) | (((u32)distance << 5) & 0xFFFFE0) | Rt);
@@ -497,13 +498,13 @@ void ARM64XEmitter::EncodeTestBranchInst(u32 op, ARM64Reg Rt, u8 bits, const voi
   bool b64Bit = Is64Bit(Rt);
   s64 distance = (s64)ptr - (s64)m_code;
 
-  _assert_msg_(DYNA_REC, !(distance & 0x3), "%s: distance must be a multiple of 4: %lx",
+  _assert_msg_(DYNA_REC, !(distance & 0x3), "%s: distance must be a multiple of 4: %" PRIx64,
                __FUNCTION__, distance);
 
   distance >>= 2;
 
   _assert_msg_(DYNA_REC, distance >= -0x3FFF && distance < 0x3FFF,
-               "%s: Received too large distance: %lx", __FUNCTION__, distance);
+               "%s: Received too large distance: %" PRIx64, __FUNCTION__, distance);
 
   Rt = DecodeReg(Rt);
   Write32((b64Bit << 31) | (0x36 << 24) | (op << 24) | (bits << 19) |
@@ -514,13 +515,13 @@ void ARM64XEmitter::EncodeUnconditionalBranchInst(u32 op, const void* ptr)
 {
   s64 distance = (s64)ptr - s64(m_code);
 
-  _assert_msg_(DYNA_REC, !(distance & 0x3), "%s: distance must be a multiple of 4: %lx",
+  _assert_msg_(DYNA_REC, !(distance & 0x3), "%s: distance must be a multiple of 4: %" PRIx64,
                __FUNCTION__, distance);
 
   distance >>= 2;
 
   _assert_msg_(DYNA_REC, distance >= -0x2000000LL && distance <= 0x1FFFFFFLL,
-               "%s: Received too large distance: %lx", __FUNCTION__, distance);
+               "%s: Received too large distance: %" PRIx64, __FUNCTION__, distance);
 
   Write32((op << 31) | (0x5 << 26) | (distance & 0x3FFFFFF));
 }
@@ -902,37 +903,42 @@ void ARM64XEmitter::SetJumpTarget(FixupBranch const& branch)
     Not = true;
   case 0:  // CBZ
   {
-    _assert_msg_(DYNA_REC, IsInRangeImm19(distance), "%s(%d): Received too large distance: %lx",
-                 __FUNCTION__, branch.type, distance);
+    _assert_msg_(DYNA_REC, IsInRangeImm19(distance),
+                 "%s(%d): Received too large distance: %" PRIx64, __FUNCTION__, branch.type,
+                 distance);
     bool b64Bit = Is64Bit(branch.reg);
     ARM64Reg reg = DecodeReg(branch.reg);
     inst = (b64Bit << 31) | (0x1A << 25) | (Not << 24) | (MaskImm19(distance) << 5) | reg;
   }
   break;
   case 2:  // B (conditional)
-    _assert_msg_(DYNA_REC, IsInRangeImm19(distance), "%s(%d): Received too large distance: %lx",
-                 __FUNCTION__, branch.type, distance);
+    _assert_msg_(DYNA_REC, IsInRangeImm19(distance),
+                 "%s(%d): Received too large distance: %" PRIx64, __FUNCTION__, branch.type,
+                 distance);
     inst = (0x2A << 25) | (MaskImm19(distance) << 5) | branch.cond;
     break;
   case 4:  // TBNZ
     Not = true;
   case 3:  // TBZ
   {
-    _assert_msg_(DYNA_REC, IsInRangeImm14(distance), "%s(%d): Received too large distance: %lx",
-                 __FUNCTION__, branch.type, distance);
+    _assert_msg_(DYNA_REC, IsInRangeImm14(distance),
+                 "%s(%d): Received too large distance: %" PRIx64, __FUNCTION__, branch.type,
+                 distance);
     ARM64Reg reg = DecodeReg(branch.reg);
     inst = ((branch.bit & 0x20) << 26) | (0x1B << 25) | (Not << 24) | ((branch.bit & 0x1F) << 19) |
            (MaskImm14(distance) << 5) | reg;
   }
   break;
   case 5:  // B (uncoditional)
-    _assert_msg_(DYNA_REC, IsInRangeImm26(distance), "%s(%d): Received too large distance: %lx",
-                 __FUNCTION__, branch.type, distance);
+    _assert_msg_(DYNA_REC, IsInRangeImm26(distance),
+                 "%s(%d): Received too large distance: %" PRIx64, __FUNCTION__, branch.type,
+                 distance);
     inst = (0x5 << 26) | MaskImm26(distance);
     break;
   case 6:  // BL (unconditional)
-    _assert_msg_(DYNA_REC, IsInRangeImm26(distance), "%s(%d): Received too large distance: %lx",
-                 __FUNCTION__, branch.type, distance);
+    _assert_msg_(DYNA_REC, IsInRangeImm26(distance),
+                 "%s(%d): Received too large distance: %" PRIx64, __FUNCTION__, branch.type,
+                 distance);
     inst = (0x25 << 26) | MaskImm26(distance);
     break;
   }
@@ -1021,8 +1027,8 @@ void ARM64XEmitter::B(CCFlags cond, const void* ptr)
   distance >>= 2;
 
   _assert_msg_(DYNA_REC, IsInRangeImm19(distance),
-               "%s: Received too large distance: %p->%p %ld %lx", __FUNCTION__, m_code, ptr,
-               distance, distance);
+               "%s: Received too large distance: %p->%p %" PRIi64 " %" PRIx64, __FUNCTION__, m_code,
+               ptr, distance, distance);
   Write32((0x54 << 24) | (MaskImm19(distance) << 5) | cond);
 }
 
@@ -4102,27 +4108,29 @@ void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
   }
 }
 
+void ARM64XEmitter::AddImmediate(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool shift, bool negative,
+                                 bool flags)
+{
+  switch ((negative << 1) | flags)
+  {
+  case 0:
+    ADD(Rd, Rn, imm, shift);
+    break;
+  case 1:
+    ADDS(Rd, Rn, imm, shift);
+    break;
+  case 2:
+    SUB(Rd, Rn, imm, shift);
+    break;
+  case 3:
+    SUBS(Rd, Rn, imm, shift);
+    break;
+  }
+}
+
 void ARM64XEmitter::ADDI2R_internal(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool negative, bool flags,
                                     ARM64Reg scratch)
 {
-  auto addi = [this](ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool shift, bool negative, bool flags) {
-    switch ((negative << 1) | flags)
-    {
-    case 0:
-      ADD(Rd, Rn, imm, shift);
-      break;
-    case 1:
-      ADDS(Rd, Rn, imm, shift);
-      break;
-    case 2:
-      SUB(Rd, Rn, imm, shift);
-      break;
-    case 3:
-      SUBS(Rd, Rn, imm, shift);
-      break;
-    }
-  };
-
   bool has_scratch = scratch != INVALID_REG;
   u64 imm_neg = Is64Bit(Rd) ? -imm : -imm & 0xFFFFFFFFuLL;
   bool neg_neg = negative ? false : true;
@@ -4131,22 +4139,22 @@ void ARM64XEmitter::ADDI2R_internal(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool nega
   // Try them all first
   if (imm <= 0xFFF)
   {
-    addi(Rd, Rn, imm, false, negative, flags);
+    AddImmediate(Rd, Rn, imm, false, negative, flags);
     return;
   }
   if (imm <= 0xFFFFFF && (imm & 0xFFF) == 0)
   {
-    addi(Rd, Rn, imm >> 12, true, negative, flags);
+    AddImmediate(Rd, Rn, imm >> 12, true, negative, flags);
     return;
   }
   if (imm_neg <= 0xFFF)
   {
-    addi(Rd, Rn, imm_neg, false, neg_neg, flags);
+    AddImmediate(Rd, Rn, imm_neg, false, neg_neg, flags);
     return;
   }
   if (imm_neg <= 0xFFFFFF && (imm_neg & 0xFFF) == 0)
   {
-    addi(Rd, Rn, imm_neg >> 12, true, neg_neg, flags);
+    AddImmediate(Rd, Rn, imm_neg >> 12, true, neg_neg, flags);
     return;
   }
 
@@ -4155,14 +4163,14 @@ void ARM64XEmitter::ADDI2R_internal(ARM64Reg Rd, ARM64Reg Rn, u64 imm, bool nega
   // As this splits the addition in two parts, this must not be done on setting flags.
   if (!flags && (imm >= 0x10000u || !has_scratch) && imm < 0x1000000u)
   {
-    addi(Rd, Rn, imm & 0xFFF, false, negative, false);
-    addi(Rd, Rd, imm >> 12, true, negative, false);
+    AddImmediate(Rd, Rn, imm & 0xFFF, false, negative, false);
+    AddImmediate(Rd, Rd, imm >> 12, true, negative, false);
     return;
   }
   if (!flags && (imm_neg >= 0x10000u || !has_scratch) && imm_neg < 0x1000000u)
   {
-    addi(Rd, Rn, imm_neg & 0xFFF, false, neg_neg, false);
-    addi(Rd, Rd, imm_neg >> 12, true, neg_neg, false);
+    AddImmediate(Rd, Rn, imm_neg & 0xFFF, false, neg_neg, false);
+    AddImmediate(Rd, Rd, imm_neg >> 12, true, neg_neg, false);
     return;
   }