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authorRyan Houdek <Sonicadvance1@gmail.com>2014-11-16 09:14:02 +0000
committerRyan Houdek <Sonicadvance1@gmail.com>2014-11-16 09:29:27 +0000
commitb24197f913301dcef1655961da67cc94f278f696 (patch)
tree177f72d0cd6086d9878fb43a864c2c17dce62947 /Source/Core/Common/ArmEmitter.cpp
parent6683b194ffb06b68643c041f2f5b8df6eabe9863 (diff)
Adds MCR/MRC to the ARMv7 emitter.
Diffstat (limited to 'Source/Core/Common/ArmEmitter.cpp')
-rw-r--r--Source/Core/Common/ArmEmitter.cpp22
1 files changed, 22 insertions, 0 deletions
diff --git a/Source/Core/Common/ArmEmitter.cpp b/Source/Core/Common/ArmEmitter.cpp
index dda13cb4c1..15ef41044b 100644
--- a/Source/Core/Common/ArmEmitter.cpp
+++ b/Source/Core/Common/ArmEmitter.cpp
@@ -388,6 +388,28 @@ void ARMXEmitter::YIELD()
Write32(condition | 0x0320F001);
}
+void ARMXEmitter::MRC(u32 coproc, u32 opc1, ARMReg Rt, u32 CRn, u32 CRm, u32 opc2)
+{
+ _assert_msg_(DYNA_REC, coproc <= 0xF, "%s has co-processor that is %d when it must be under 16!", __FUNCTION__, coproc);
+ _assert_msg_(DYNA_REC, opc1 <= 7, "%s has opc1 that is %d when it must be under 8!", __FUNCTION__, opc1);
+ _assert_msg_(DYNA_REC, CRn <= 0xF, "%s has CRn that is %d when it must be under 16!", __FUNCTION__, CRn);
+ _assert_msg_(DYNA_REC, opc2 <= 7, "%s has opc2 that is %d when it must be under 8!", __FUNCTION__, opc2);
+
+ Write32(condition | (0b1110 << 24) | (opc1 << 21) | (1 << 20) | (CRn << 16) \
+ | (Rt << 12) | (coproc << 8) | (opc2 << 5) | (1 << 4) | CRm);
+}
+
+void ARMXEmitter::MCR(u32 coproc, u32 opc1, ARMReg Rt, u32 CRn, u32 CRm, u32 opc2)
+{
+ _assert_msg_(DYNA_REC, coproc <= 0xF, "%s has co-processor that is %d when it must be under 16!", __FUNCTION__, coproc);
+ _assert_msg_(DYNA_REC, opc1 <= 7, "%s has opc1 that is %d when it must be under 8!", __FUNCTION__, opc1);
+ _assert_msg_(DYNA_REC, CRn <= 0xF, "%s has CRn that is %d when it must be under 16!", __FUNCTION__, CRn);
+ _assert_msg_(DYNA_REC, opc2 <= 7, "%s has opc2 that is %d when it must be under 8!", __FUNCTION__, opc2);
+
+ Write32(condition | (0b1110 << 24) | (opc1 << 21) | (CRn << 16) \
+ | (Rt << 12) | (coproc << 8) | (opc2 << 5) | (1 << 4) | CRm);
+}
+
FixupBranch ARMXEmitter::B()
{
FixupBranch branch;