diff options
| author | Tillmann Karras <tilkax@gmail.com> | 2013-10-24 13:52:22 +0200 |
|---|---|---|
| committer | Tillmann Karras <tilkax@gmail.com> | 2013-11-13 06:24:57 +0100 |
| commit | 466a7afde336d381e250d51e4c268c769e072a02 (patch) | |
| tree | 6a6444a6e5c397a7ed557f1def295a9980fca231 /Source/Core/Common/Src/x64CPUDetect.cpp | |
| parent | 710a0ff435c8593914c6eb074b6bc4d1985ae8c5 (diff) | |
Interpreter: support non-IEEE mode emulation
v2: fix fxsave on visual studio, thx @ rodolfo for this patch
Diffstat (limited to 'Source/Core/Common/Src/x64CPUDetect.cpp')
| -rw-r--r-- | Source/Core/Common/Src/x64CPUDetect.cpp | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Source/Core/Common/Src/x64CPUDetect.cpp b/Source/Core/Common/Src/x64CPUDetect.cpp index 2b434ad2b6..182cca5224 100644 --- a/Source/Core/Common/Src/x64CPUDetect.cpp +++ b/Source/Core/Common/Src/x64CPUDetect.cpp @@ -162,6 +162,28 @@ void CPUInfo::Detect() if ((cpu_id[2] >> 20) & 1) bSSE4_2 = true; if ((cpu_id[2] >> 25) & 1) bAES = true; + if ((cpu_id[3] >> 24) & 1) + { + // We can use FXSAVE. + bFXSR = true; + + GC_ALIGNED16(u8 fx_state[512]); + memset(fx_state, 0, sizeof(fx_state)); +#ifdef _WIN32 +#ifdef _M_IX86 + _fxsave(fx_state); +#elif defined (_M_X64) + _fxsave64(fx_state); +#endif +#else + __asm__("fxsave %0" : "=m" (fx_state)); +#endif + + // lowest byte of MXCSR_MASK + if ((fx_state[0x1C] >> 6) & 1) + bDAZ = true; + } + // AVX support requires 3 separate checks: // - Is the AVX bit set in CPUID? // - Is the XSAVE bit set in CPUID? |