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authorSintendo <bram.speeckaert@gmail.com>2019-05-29 00:47:12 +0200
committerSintendo <bram.speeckaert@gmail.com>2019-05-29 01:04:09 +0200
commitc84f34bd500bbf201b68ae8520f3b3039d2f3f50 (patch)
tree99b79a3c9ee219902ab35f5116d313536bc89fad /Source/Core/Common/x64Emitter.cpp
parent992c8bfc4e2394ad5786f5116f5e62ae595b5c44 (diff)
x64Emitter: Short MOVs for 32bit immediates
Prior to this commit, the emitter would emit a 7-byte instruction when loading a 32-bit immediate to a 64-bit register. 0: 48 c7 c0 ff ff ff 7f mov rax,0x7fffffff With this change, it will check if it can instead emit a load to a 32-bit register, which takes only 5 or 6 bytes. 0: b8 ff ff ff 7f mov eax,0x7fffffff
Diffstat (limited to 'Source/Core/Common/x64Emitter.cpp')
-rw-r--r--Source/Core/Common/x64Emitter.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/Source/Core/Common/x64Emitter.cpp b/Source/Core/Common/x64Emitter.cpp
index 63c094ad6f..947e6e5614 100644
--- a/Source/Core/Common/x64Emitter.cpp
+++ b/Source/Core/Common/x64Emitter.cpp
@@ -1591,8 +1591,9 @@ void XEmitter::XOR(int bits, const OpArg& a1, const OpArg& a2)
}
void XEmitter::MOV(int bits, const OpArg& a1, const OpArg& a2)
{
- if (bits == 64 && a1.IsSimpleReg() && a2.scale == SCALE_IMM64 &&
- a2.offset == static_cast<u32>(a2.offset))
+ if (bits == 64 && a1.IsSimpleReg() &&
+ ((a2.scale == SCALE_IMM64 && a2.offset == static_cast<u32>(a2.offset)) ||
+ (a2.scale == SCALE_IMM32 && static_cast<s32>(a2.offset) >= 0)))
{
WriteNormalOp(32, NormalOp::MOV, a1, a2.AsImm32());
return;