JitArm64: Use enum class for LogicalImm size parameter

This should prevent issues like the one fixed in the previous commit
from happening again.

2 files changed, 18 insertions, 15 deletions

diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp
index 81bb56ba62..d70d48d72f 100644
--- a/Source/Core/Common/Arm64Emitter.cpp
+++ b/Source/Core/Common/Arm64Emitter.cpp
@@ -1932,13 +1932,13 @@ void ARM64XEmitter::MOVI2RImpl(ARM64Reg Rd, T imm)
                           (imm & 0xFFFF'FFFF'0000'0000) | (imm >> 32),
                           (imm << 48) | (imm & 0x0000'FFFF'FFFF'0000) | (imm >> 48)})
       {
-        if (LogicalImm(orr_imm, 64))
+        if (LogicalImm(orr_imm, GPRSize::B64))
           try_base(orr_imm, Approach::ORRBase, false);
       }
     }
     else
     {
-      if (LogicalImm(imm, 32))
+      if (LogicalImm(imm, GPRSize::B32))
         try_base(imm, Approach::ORRBase, false);
     }
   }
@@ -4041,7 +4041,7 @@ void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
   if (!Is64Bit(Rn))
     imm &= 0xFFFFFFFF;
 
-  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
   {
     AND(Rd, Rn, result);
   }
@@ -4057,7 +4057,7 @@ void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 
 void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
-  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
   {
     ORR(Rd, Rn, result);
   }
@@ -4073,7 +4073,7 @@ void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 
 void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
-  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
   {
     EOR(Rd, Rn, result);
   }
@@ -4089,7 +4089,7 @@ void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 
 void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
 {
-  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rn) ? GPRSize::B64 : GPRSize::B32))
   {
     ANDS(Rd, Rn, result);
   }
@@ -4265,7 +4265,7 @@ bool ARM64XEmitter::TryCMPI2R(ARM64Reg Rn, u64 imm)
 
 bool ARM64XEmitter::TryANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm)
 {
-  if (const auto result = LogicalImm(imm, Is64Bit(Rd) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rd) ? GPRSize::B64 : GPRSize::B32))
   {
     AND(Rd, Rn, result);
     return true;
@@ -4276,7 +4276,7 @@ bool ARM64XEmitter::TryANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm)
 
 bool ARM64XEmitter::TryORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm)
 {
-  if (const auto result = LogicalImm(imm, Is64Bit(Rd) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rd) ? GPRSize::B64 : GPRSize::B32))
   {
     ORR(Rd, Rn, result);
     return true;
@@ -4287,7 +4287,7 @@ bool ARM64XEmitter::TryORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm)
 
 bool ARM64XEmitter::TryEORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm)
 {
-  if (const auto result = LogicalImm(imm, Is64Bit(Rd) ? 64 : 32))
+  if (const auto result = LogicalImm(imm, Is64Bit(Rd) ? GPRSize::B64 : GPRSize::B32))
   {
     EOR(Rd, Rn, result);
     return true;
diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h
index e8bee81f48..e97e72f3c3 100644
--- a/Source/Core/Common/Arm64Emitter.h
+++ b/Source/Core/Common/Arm64Emitter.h
@@ -350,6 +350,12 @@ enum class RoundingMode
   Z,  // round towards zero
 };
 
+enum class GPRSize
+{
+  B32,
+  B64,
+};
+
 struct FixupBranch
 {
   enum class Type : u32
@@ -522,7 +528,7 @@ struct LogicalImm
 
   constexpr LogicalImm(u8 r_, u8 s_, bool n_) : r(r_), s(s_), n(n_), valid(true) {}
 
-  constexpr LogicalImm(u64 value, u32 width)
+  constexpr LogicalImm(u64 value, GPRSize size)
   {
     // Logical immediates are encoded using parameters n, imm_s and imm_r using
     // the following table:
@@ -540,17 +546,14 @@ struct LogicalImm
     // are set. The pattern is rotated right by R, and repeated across a 32 or
     // 64-bit value, depending on destination register width.
 
-    constexpr int kWRegSizeInBits = 32;
-
-    if (width == kWRegSizeInBits)
+    if (size == GPRSize::B32)
     {
       // To handle 32-bit logical immediates, the very easiest thing is to repeat
       // the input value twice to make a 64-bit word. The correct encoding of that
       // as a logical immediate will also be the correct encoding of the 32-bit
       // value.
 
-      value <<= kWRegSizeInBits;
-      value |= value >> kWRegSizeInBits;
+      value = (value << 32) | (value & 0xFFFFFFFF);
     }
 
     if (value == 0 || (~value) == 0)