diff options
| author | degasus <wickmarkus@web.de> | 2016-10-27 00:32:04 +0200 |
|---|---|---|
| committer | degasus <wickmarkus@web.de> | 2016-10-29 13:35:23 +0200 |
| commit | f1a67bb1a2cb8e8bbdf564c262b131deef31bd87 (patch) | |
| tree | 4652e41dc64ce951bf43db2b3c0ebbd7153226aa /Source/Core/Common | |
| parent | a8b1347ea99383955c36c93475d5fe7608f59630 (diff) | |
JitArm64: Implement divwx
Diffstat (limited to 'Source/Core/Common')
| -rw-r--r-- | Source/Core/Common/Arm64Emitter.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h index ea69c371c3..87d89be9a2 100644 --- a/Source/Core/Common/Arm64Emitter.h +++ b/Source/Core/Common/Arm64Emitter.h @@ -651,6 +651,11 @@ public: ARM64Reg zr = Is64Bit(Rd) ? ZR : WZR; CSINC(Rd, zr, zr, (CCFlags)((u32)cond ^ 1)); } + void CSETM(ARM64Reg Rd, CCFlags cond) + { + ARM64Reg zr = Is64Bit(Rd) ? ZR : WZR; + CSINV(Rd, zr, zr, (CCFlags)((u32)cond ^ 1)); + } void NEG(ARM64Reg Rd, ARM64Reg Rs) { SUB(Rd, Is64Bit(Rd) ? ZR : WZR, Rs); } // Data-Processing 1 source void RBIT(ARM64Reg Rd, ARM64Reg Rn); |