diff options
| author | nakeee <nakeee@gmail.com> | 2009-07-26 16:36:22 +0000 |
|---|---|---|
| committer | nakeee <nakeee@gmail.com> | 2009-07-26 16:36:22 +0000 |
| commit | 07617f757c7bb0d9795ec2b7dec0f4707ca969a9 (patch) | |
| tree | 0e5a6a885432cfa5896e50033e019bb452da42fd /Source/Core/DSPCore/Src/DSPIntExtOps.cpp | |
| parent | 73a768604468171f3a5f61e8041add6b446b518b (diff) | |
DSPLLE added new LD code (please report games misbehaving)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3887 8ced0084-cf51-0410-be5f-012b33b47a6e
Diffstat (limited to 'Source/Core/DSPCore/Src/DSPIntExtOps.cpp')
| -rw-r--r-- | Source/Core/DSPCore/Src/DSPIntExtOps.cpp | 83 |
1 files changed, 60 insertions, 23 deletions
diff --git a/Source/Core/DSPCore/Src/DSPIntExtOps.cpp b/Source/Core/DSPCore/Src/DSPIntExtOps.cpp index 4ee619e33e..8dfe818173 100644 --- a/Source/Core/DSPCore/Src/DSPIntExtOps.cpp +++ b/Source/Core/DSPCore/Src/DSPIntExtOps.cpp @@ -348,13 +348,22 @@ void slnm_epi(const UDSPInstruction& opc) // xxxx xxxx 11dr 00ss void ld(const UDSPInstruction& opc) { - u8 dreg = (((opc.hex >> 5) & 0x1) << 1) + DSP_REG_AXL0; - u8 rreg = (((opc.hex >> 4) & 0x1) << 1) + DSP_REG_AXL1; + u8 dreg = (opc.hex >> 5) & 0x1; + u8 rreg = (opc.hex >> 4) & 0x1; u8 sreg = opc.hex & 0x3; - g_dsp.r[dreg] = dsp_dmem_read(g_dsp.r[sreg]); - g_dsp.r[rreg] = dsp_dmem_read(g_dsp.r[DSP_REG_AR3]); - dsp_increment_addr_reg(sreg); + if (sreg != 0x03) { + g_dsp.r[(dreg << 1) + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[sreg]); + g_dsp.r[(rreg << 1) + DSP_REG_AXL1] = dsp_dmem_read(g_dsp.r[sreg]); + + dsp_increment_addr_reg(sreg); + } else { + g_dsp.r[rreg + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[dreg]); + g_dsp.r[rreg + DSP_REG_AXH0] = dsp_dmem_read(g_dsp.r[dreg]); + + dsp_increment_addr_reg(dreg); + } + dsp_increment_addr_reg(DSP_REG_AR3); } @@ -363,29 +372,48 @@ void ld(const UDSPInstruction& opc) // xxxx xxxx 11dr 01ss void ldn(const UDSPInstruction& opc) { - u8 dreg = (((opc.hex >> 5) & 0x1) << 1) + DSP_REG_AXL0; - u8 rreg = (((opc.hex >> 4) & 0x1) << 1) + DSP_REG_AXL1; + u8 dreg = (opc.hex >> 5) & 0x1; + u8 rreg = (opc.hex >> 4) & 0x1; u8 sreg = opc.hex & 0x3; - g_dsp.r[dreg] = dsp_dmem_read(g_dsp.r[sreg]); - g_dsp.r[rreg] = dsp_dmem_read(g_dsp.r[DSP_REG_AR3]); - g_dsp.r[sreg] += g_dsp.r[sreg + DSP_REG_IX0]; - dsp_increment_addr_reg(DSP_REG_AR3); + if (sreg != 0x03) { + g_dsp.r[(dreg << 1) + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[sreg]); + g_dsp.r[(rreg << 1) + DSP_REG_AXL1] = dsp_dmem_read(g_dsp.r[sreg]); + + dsp_increase_addr_reg(sreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]); + } else { + g_dsp.r[rreg + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[dreg]); + g_dsp.r[rreg + DSP_REG_AXH0] = dsp_dmem_read(g_dsp.r[dreg]); + + dsp_increase_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + dreg]); + } + + dsp_increment_addr_reg(DSP_REG_AR3); } + // Not in duddie's doc // LDM $ax0.d $ax1.r @$arS // xxxx xxxx 11dr 10ss void ldm(const UDSPInstruction& opc) { - u8 dreg = (((opc.hex >> 5) & 0x1) << 1) + DSP_REG_AXL0; - u8 rreg = (((opc.hex >> 4) & 0x1) << 1) + DSP_REG_AXL1; + u8 dreg = (opc.hex >> 5) & 0x1; + u8 rreg = (opc.hex >> 4) & 0x1; u8 sreg = opc.hex & 0x3; - g_dsp.r[dreg] = dsp_dmem_read(g_dsp.r[sreg]); - g_dsp.r[rreg] = dsp_dmem_read(g_dsp.r[DSP_REG_AR3]); - dsp_increment_addr_reg(sreg); - g_dsp.r[DSP_REG_AR3] += g_dsp.r[DSP_REG_IX3]; + if (sreg != 0x03) { + g_dsp.r[(dreg << 1) + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[sreg]); + g_dsp.r[(rreg << 1) + DSP_REG_AXL1] = dsp_dmem_read(g_dsp.r[sreg]); + + dsp_increment_addr_reg(sreg); + } else { + g_dsp.r[rreg + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[dreg]); + g_dsp.r[rreg + DSP_REG_AXH0] = dsp_dmem_read(g_dsp.r[dreg]); + + dsp_increment_addr_reg(dreg); + } + + dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]); } // Not in duddie's doc @@ -393,14 +421,23 @@ void ldm(const UDSPInstruction& opc) // xxxx xxxx 11dr 11ss void ldnm(const UDSPInstruction& opc) { - u8 dreg = (((opc.hex >> 5) & 0x1) << 1) + DSP_REG_AXL0; - u8 rreg = (((opc.hex >> 4) & 0x1) << 1) + DSP_REG_AXL1; + u8 dreg = (opc.hex >> 5) & 0x1; + u8 rreg = (opc.hex >> 4) & 0x1; u8 sreg = opc.hex & 0x3; - g_dsp.r[dreg] = dsp_dmem_read(g_dsp.r[sreg]); - g_dsp.r[rreg] = dsp_dmem_read(g_dsp.r[DSP_REG_AR3]); - g_dsp.r[sreg] += g_dsp.r[sreg + DSP_REG_IX0]; - g_dsp.r[DSP_REG_AR3] += g_dsp.r[DSP_REG_IX3]; + if (sreg != 0x03) { + g_dsp.r[(dreg << 1) + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[sreg]); + g_dsp.r[(rreg << 1) + DSP_REG_AXL1] = dsp_dmem_read(g_dsp.r[sreg]); + + dsp_increase_addr_reg(sreg, (s16)g_dsp.r[DSP_REG_IX0 + sreg]); + } else { + g_dsp.r[rreg + DSP_REG_AXL0] = dsp_dmem_read(g_dsp.r[dreg]); + g_dsp.r[rreg + DSP_REG_AXH0] = dsp_dmem_read(g_dsp.r[dreg]); + + dsp_increase_addr_reg(dreg, (s16)g_dsp.r[DSP_REG_IX0 + dreg]); + } + + dsp_increase_addr_reg(DSP_REG_AR3, (s16)g_dsp.r[DSP_REG_IX0 + DSP_REG_AR3]); } void nop(const UDSPInstruction& opc) |