Core/DSPCore: Changed g_dsp._r back to g_dsp.r. Removed the check*Exclude

functions accidentally added. Fixed the jitted ar register arithmetic.
Added a CMakeList.txt for the UnitTests, but did not add the subdirectory
to Source/CMakeLists.txt.


git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6687 8ced0084-cf51-0410-be5f-012b33b47a6e

1 files changed, 118 insertions, 112 deletions

diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
index 898d19997d..57197896de 100644
--- a/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
+++ b/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp
@@ -83,21 +83,24 @@ void DSPEmitter::s(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
+		break;
+	default:
+		sregp = NULL;
 		break;
 	}
 	//	u16 addr = g_dsp.r[dest];
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 	MOVZX(32, 16, ECX, M(sregp));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp, &g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp, &g_dsp.r)));
 #endif
 	//	u16 val = g_dsp.r[src];
 	dmem_write();
@@ -116,20 +119,23 @@ void DSPEmitter::sn(const UDSPInstruction opc)
 	switch(sreg) {
 	case DSP_REG_ACL0:
 	case DSP_REG_ACL1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACL0].l);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACL0].l);
 		break;
 	case DSP_REG_ACM0:
 	case DSP_REG_ACM1:
-		sregp = &(g_dsp._r.ac[sreg-DSP_REG_ACM0].m);
+		sregp = &(g_dsp.r.ac[sreg-DSP_REG_ACM0].m);
+		break;
+	default:
+		sregp = NULL;
 		break;
 	}
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[dreg]));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[dreg]));
 	MOVZX(32, 16, ECX, M(sregp));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp,&g_dsp._r)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+	MOVZX(64, 16, ECX, MDisp(R11,PtrOffset(sregp,&g_dsp.r)));
 #endif
 	dmem_write();
 	increase_addr_reg(dreg);
@@ -152,9 +158,9 @@ void DSPEmitter::l(const UDSPInstruction opc)
 		//store (up to) two registers in EBX,
 		//so store all of SR
 #ifdef _M_IX86 // All32
-		MOV(16, R(EAX), M(&g_dsp._r.sr));
+		MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r.sr));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r.sr));
 		MOV(16, R(EAX), MatR(R11));
 #endif
 		SHL(32, R(EAX), Imm8(16));
@@ -181,9 +187,9 @@ void DSPEmitter::ln(const UDSPInstruction opc)
 		//store (up to) two registers in EBX,
 		//so store all of SR
 #ifdef _M_IX86 // All32
-		MOV(16, R(EAX), M(&g_dsp._r.sr));
+		MOV(16, R(EAX), M(&g_dsp.r.sr));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r.sr));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r.sr));
 		MOV(16, R(EAX), MatR(R11));
 #endif
 		SHL(32, R(EAX), Imm8(16));
@@ -203,12 +209,12 @@ void DSPEmitter::ls(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -230,12 +236,12 @@ void DSPEmitter::lsn(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -256,12 +262,12 @@ void DSPEmitter::lsm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -283,12 +289,12 @@ void DSPEmitter::lsnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[3]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[3]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -308,12 +314,12 @@ void DSPEmitter::sl(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -334,12 +340,12 @@ void DSPEmitter::sln(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -360,12 +366,12 @@ void DSPEmitter::slm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -386,12 +392,12 @@ void DSPEmitter::slnm(const UDSPInstruction opc)
 	u8 sreg = opc & 0x1;
 	u8 dreg = ((opc >> 4) & 0x3) + DSP_REG_AXL0;
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, EAX, M(&g_dsp._r.ar[0]));
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ac[sreg].m));
+	MOVZX(32, 16, EAX, M(&g_dsp.r.ar[0]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ac[sreg].m));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[0])));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[sreg].m)));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, EAX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[0])));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[sreg].m)));
 #endif
 	dmem_write();
 
@@ -422,12 +428,12 @@ void DSPEmitter::ld(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -446,12 +452,12 @@ void DSPEmitter::ld(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -482,12 +488,12 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -505,12 +511,12 @@ void DSPEmitter::ldn(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -541,12 +547,12 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -564,12 +570,12 @@ void DSPEmitter::ldm(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -600,12 +606,12 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
 
 		// 	if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[sreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[sreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -623,12 +629,12 @@ void DSPEmitter::ldnm(const UDSPInstruction opc)
 
 		//if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) {
 #ifdef _M_IX86 // All32
-		MOV(16, R(ESI), M(&g_dsp._r.ar[dreg]));
-		MOV(16, R(EDI), M(&g_dsp._r.ar[3]));
+		MOV(16, R(ESI), M(&g_dsp.r.ar[dreg]));
+		MOV(16, R(EDI), M(&g_dsp.r.ar[3]));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[dreg])));
-		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[3])));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, R(ESI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[dreg])));
+		MOV(16, R(EDI), MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[3])));
 #endif
 		SHR(16, R(ESI), Imm8(10));
 		SHR(16, R(EDI), Imm8(10));
@@ -654,8 +660,8 @@ void DSPEmitter::pushExtValueFromReg(u16 dreg, u16 sreg) {
 #ifdef _M_IX86 // All32
 	MOVZX(32, 16, EBX, M(sregp));
 #else
-	MOV(64, R(RBX), ImmPtr(&g_dsp._r));
-	MOVZX(32, 16, EBX, MDisp(RBX,PtrOffset(sregp,&g_dsp._r)));
+	MOV(64, R(RBX), ImmPtr(&g_dsp.r));
+	MOVZX(32, 16, EBX, MDisp(RBX,PtrOffset(sregp,&g_dsp.r)));
 #endif
 	storeIndex = dreg;
 }
@@ -663,10 +669,10 @@ void DSPEmitter::pushExtValueFromReg(u16 dreg, u16 sreg) {
 void DSPEmitter::pushExtValueFromMem(u16 dreg, u16 sreg) {
 	//	u16 addr = g_dsp.r[addr];
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[sreg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[sreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
 #endif
 	dmem_read();
 	MOVZX(32, 16, EBX, R(EAX));
@@ -677,10 +683,10 @@ void DSPEmitter::pushExtValueFromMem(u16 dreg, u16 sreg) {
 void DSPEmitter::pushExtValueFromMem2(u16 dreg, u16 sreg) {
 	//	u16 addr = g_dsp.r[addr];
 #ifdef _M_IX86 // All32
-	MOVZX(32, 16, ECX, M(&g_dsp._r.ar[sreg]));
+	MOVZX(32, 16, ECX, M(&g_dsp.r.ar[sreg]));
 #else
-	MOV(64, R(R11), ImmPtr(&g_dsp._r));
-	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ar[sreg])));
+	MOV(64, R(R11), ImmPtr(&g_dsp.r));
+	MOVZX(64, 16, ECX, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ar[sreg])));
 #endif
 	dmem_read();
 	SHL(32,R(EAX),Imm8(16));
@@ -702,8 +708,8 @@ void DSPEmitter::popExtValueToReg() {
 #ifdef _M_IX86 // All32
 		MOV(16, M(dregp), R(EBX));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,PtrOffset(dregp,&g_dsp._r)), R(EBX));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,PtrOffset(dregp,&g_dsp.r)), R(EBX));
 #endif
 		if (storeIndex  >= DSP_REG_ACM0 && storeIndex2 == -1) {
 			TEST(32, R(EBX), Imm32(SR_40_MODE_BIT << 16));
@@ -717,13 +723,13 @@ void DSPEmitter::popExtValueToReg() {
 			//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACH0] = (val & 0x8000) ? 0xFFFF : 0x0000;
 			//g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACL0] = 0;
 #ifdef _M_IX86 // All32
-			MOV(16,M(&g_dsp._r.ac[storeIndex - DSP_REG_ACM0].h),
+			MOV(16,M(&g_dsp.r.ac[storeIndex - DSP_REG_ACM0].h),
 			    R(EAX));
-			MOV(16,M(&g_dsp._r.ac[storeIndex - DSP_REG_ACM0].l),
+			MOV(16,M(&g_dsp.r.ac[storeIndex - DSP_REG_ACM0].l),
 			    Imm16(0));
 #else
-			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[storeIndex - DSP_REG_ACM0].h)), R(EAX));
-			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp._r, ac[storeIndex - DSP_REG_ACM0].l)), Imm16(0));
+			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[storeIndex - DSP_REG_ACM0].h)), R(EAX));
+			MOV(16, MDisp(R11,STRUCT_OFFSET(g_dsp.r, ac[storeIndex - DSP_REG_ACM0].l)), Imm16(0));
 #endif
 			//}
 			SetJumpTarget(not_40bit);
@@ -738,8 +744,8 @@ void DSPEmitter::popExtValueToReg() {
 #ifdef _M_IX86 // All32
 		MOV(16, M(dregp), R(EBX));
 #else
-		MOV(64, R(R11), ImmPtr(&g_dsp._r));
-		MOV(16, MDisp(R11,PtrOffset(dregp, &g_dsp._r)), R(EBX));
+		MOV(64, R(R11), ImmPtr(&g_dsp.r));
+		MOV(16, MDisp(R11,PtrOffset(dregp, &g_dsp.r)), R(EBX));
 #endif
 	}
 	storeIndex2 = -1;