DSPLLE:

Enable the SET40 sign extension stuff.
Try to separate the "core" from the "interpreter" logically, a little bit. It's still a bit of a fuzzy border. 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3128 8ced0084-cf51-0410-be5f-012b33b47a6e

15 files changed, 352 insertions, 284 deletions

diff --git a/Source/Core/DSPCore/DSPCore.vcproj b/Source/Core/DSPCore/DSPCore.vcproj
index f7a0fc90f6..73ae94b8c6 100644
--- a/Source/Core/DSPCore/DSPCore.vcproj
+++ b/Source/Core/DSPCore/DSPCore.vcproj
@@ -435,6 +435,14 @@
 			>

 		</File>

 		<File

+			RelativePath=".\Src\DSPCore.cpp"

+			>

+		</File>

+		<File

+			RelativePath=".\Src\DSPCore.h"

+			>

+		</File>

+		<File

 			RelativePath=".\Src\DSPHost.h"

 			>

 		</File>

diff --git a/Source/Core/DSPCore/Src/DSPCore.cpp b/Source/Core/DSPCore/Src/DSPCore.cpp
new file mode 100644
index 0000000000..270952f8ed
--- /dev/null
+++ b/Source/Core/DSPCore/Src/DSPCore.cpp
@@ -0,0 +1,205 @@
+/*====================================================================

+

+   filename:     gdsp_interpreter.cpp

+   project:      GCemu

+   created:      2004-6-18

+   mail:		  duddie@walla.com

+

+   Copyright (c) 2005 Duddie & Tratax

+

+   This program is free software; you can redistribute it and/or

+   modify it under the terms of the GNU General Public License

+   as published by the Free Software Foundation; either version 2

+   of the License, or (at your option) any later version.

+

+   This program is distributed in the hope that it will be useful,

+   but WITHOUT ANY WARRANTY; without even the implied warranty of

+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+   GNU General Public License for more details.

+

+   You should have received a copy of the GNU General Public License

+   along with this program; if not, write to the Free Software

+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.

+

+   ====================================================================*/

+

+#include "Common.h"

+#include "DSPCore.h"

+#include "DSPAnalyzer.h"

+#include "MemoryUtil.h"

+

+#include "gdsp_interface.h"

+#include "gdsp_registers.h"

+#include "gdsp_opcodes_helper.h"

+

+//namespace DSPCore 

+//{

+

+SDSP g_dsp;

+

+

+//-------------------------------------------------------------------------------

+

+void gdsp_init()

+{

+	g_dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);

+	g_dsp.iram = (u16*)AllocateMemoryPages(DSP_IRAM_BYTE_SIZE);

+	g_dsp.dram = (u16*)AllocateMemoryPages(DSP_DRAM_BYTE_SIZE);

+	g_dsp.coef = (u16*)AllocateMemoryPages(DSP_COEF_BYTE_SIZE);

+

+	// Fill roms with zeros. 

+	memset(g_dsp.irom, 0, DSP_IROM_BYTE_SIZE);

+	memset(g_dsp.coef, 0, DSP_COEF_BYTE_SIZE);

+

+	for (int i = 0; i < 32; i++)

+	{

+		g_dsp.r[i] = 0;

+	}

+

+	for (int i = 0; i < 4; i++)

+	{

+		g_dsp.reg_stack_ptr[i] = 0;

+		for (int j = 0; j < DSP_STACK_DEPTH; j++)

+		{

+			g_dsp.reg_stack[i][j] = 0;

+		}

+	}

+

+	// Fill IRAM with HALT opcodes.

+	for (int i = 0; i < DSP_IRAM_SIZE; i++)

+	{

+		g_dsp.iram[i] = 0x0021; // HALT opcode

+	}

+

+	// Just zero out DRAM.

+	for (int i = 0; i < DSP_DRAM_SIZE; i++)

+	{

+		g_dsp.dram[i] = 0x2100;

+	}

+

+	// copied from a real console after the custom UCode has been loaded

+	g_dsp.r[0x08] = 0xffff;

+	g_dsp.r[0x09] = 0xffff;

+	g_dsp.r[0x0a] = 0xffff;

+	g_dsp.r[0x0b] = 0xffff;

+

+	g_dsp.cr = 0x804;

+	gdsp_ifx_init();

+

+	// Mostly keep IRAM write protected. We unprotect only when DMA-ing

+	// in new ucodes.

+	WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);

+	DSPAnalyzer::Analyze();

+}

+

+void gdsp_shutdown()

+{

+	FreeMemoryPages(g_dsp.irom, DSP_IROM_BYTE_SIZE);

+	FreeMemoryPages(g_dsp.iram, DSP_IRAM_BYTE_SIZE);

+	FreeMemoryPages(g_dsp.dram, DSP_DRAM_BYTE_SIZE);

+	FreeMemoryPages(g_dsp.coef, DSP_COEF_BYTE_SIZE);

+}

+

+

+void gdsp_reset()

+{

+    _assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "reset while exception");

+    g_dsp.pc = DSP_RESET_VECTOR;

+    g_dsp.exception_in_progress_hack = false;

+}

+

+

+void gdsp_generate_exception(u8 level)

+{

+	g_dsp.exceptions |= 1 << level;

+}

+

+bool gdsp_load_irom(const char *fname)

+{

+	FILE *pFile = fopen(fname, "rb");

+	if (pFile)

+	{

+		size_t size_in_bytes = DSP_IROM_SIZE * sizeof(u16);

+		size_t read_bytes = fread(g_dsp.irom, 1, size_in_bytes, pFile);

+		if (read_bytes != size_in_bytes)

+		{

+			PanicAlert("IROM too short : %i/%i", (int)read_bytes, (int)size_in_bytes);

+			fclose(pFile);

+			return false;

+		}

+		fclose(pFile);

+	

+		// Byteswap the rom.

+		for (int i = 0; i < DSP_IROM_SIZE; i++)

+			g_dsp.irom[i] = Common::swap16(g_dsp.irom[i]);

+

+		return true;

+	}

+	// Always keep IROM write protected.

+	WriteProtectMemory(g_dsp.irom, DSP_IROM_BYTE_SIZE, false);

+	return false;

+}

+

+bool gdsp_load_coef(const char *fname)

+{

+	FILE *pFile = fopen(fname, "rb");

+	if (pFile)

+	{

+		size_t size_in_bytes = DSP_COEF_SIZE * sizeof(u16);

+		size_t read_bytes = fread(g_dsp.coef, 1, size_in_bytes, pFile);

+		if (read_bytes != size_in_bytes)

+		{

+			PanicAlert("COEF too short : %i/%i", (int)read_bytes, (int)size_in_bytes);

+			fclose(pFile);

+			return false;

+		}

+		fclose(pFile);

+		// Byteswap the rom.

+		for (int i = 0; i < DSP_IROM_SIZE; i++)

+			g_dsp.coef[i] = Common::swap16(g_dsp.coef[i]);

+		return true;

+	}

+	// Always keep COEF write protected. We unprotect only when DMA-ing

+	WriteProtectMemory(g_dsp.coef, DSP_COEF_BYTE_SIZE, false);

+	return false;

+}

+

+void gdsp_check_external_int()

+{

+	// check if there is an external interrupt

+	if (g_dsp.cr & CR_EXTERNAL_INT)

+	{

+		if (dsp_SR_is_flag_set(FLAG_ENABLE_INTERUPT) && (g_dsp.exception_in_progress_hack == false))

+		{

+			// level 7 is the interrupt exception

+			gdsp_generate_exception(7);

+			g_dsp.cr &= ~0x0002;

+		}

+	}

+}

+

+void gdsp_check_exceptions()

+{

+	// check exceptions

+	if ((g_dsp.exceptions != 0) && (!g_dsp.exception_in_progress_hack))

+	{

+		for (int i = 0; i < 8; i++)

+		{

+			if (g_dsp.exceptions & (1 << i))

+			{

+				_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");

+

+				dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);

+				dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);

+

+				g_dsp.pc = i * 2;

+				g_dsp.exceptions &= ~(1 << i);

+

+				g_dsp.exception_in_progress_hack = true;

+				break;

+			}

+		}

+	}

+}

+

+//}  // namespace
\ No newline at end of file
diff --git a/Source/Core/DSPCore/Src/DSPCore.h b/Source/Core/DSPCore/Src/DSPCore.h
new file mode 100644
index 0000000000..fa0232929b
--- /dev/null
+++ b/Source/Core/DSPCore/Src/DSPCore.h
@@ -0,0 +1,101 @@
+/*====================================================================

+

+   filename:     DSPCore.h

+   project:      GCemu

+   created:      2004-6-18

+   mail:		  duddie@walla.com

+

+   Copyright (c) 2005 Duddie & Tratax

+

+   This program is free software; you can redistribute it and/or

+   modify it under the terms of the GNU General Public License

+   as published by the Free Software Foundation; either version 2

+   of the License, or (at your option) any later version.

+

+   This program is distributed in the hope that it will be useful,

+   but WITHOUT ANY WARRANTY; without even the implied warranty of

+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+   GNU General Public License for more details.

+

+   You should have received a copy of the GNU General Public License

+   along with this program; if not, write to the Free Software

+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.

+

+   ====================================================================*/

+

+#ifndef _DSPCORE_H

+#define _DSPCORE_H

+

+//namespace DSPCore

+//{

+

+#define DSP_IRAM_BYTE_SIZE   0x2000

+#define DSP_IRAM_SIZE        0x1000

+#define DSP_IRAM_MASK        0x0fff

+

+#define DSP_IROM_BYTE_SIZE   0x2000

+#define DSP_IROM_SIZE        0x1000

+#define DSP_IROM_MASK        0x0fff

+

+#define DSP_DRAM_BYTE_SIZE   0x2000

+#define DSP_DRAM_SIZE        0x1000

+#define DSP_DRAM_MASK        0x0fff

+

+#define DSP_COEF_BYTE_SIZE   0x2000

+#define DSP_COEF_SIZE        0x1000

+#define DSP_COEF_MASK        0x0fff

+

+#define DSP_RESET_VECTOR     0x8000

+

+#define DSP_STACK_DEPTH 0x20

+#define DSP_STACK_MASK  0x1f

+

+#define DSP_CR_IMEM     2

+#define DSP_CR_DMEM     0

+#define DSP_CR_TO_CPU   1

+#define DSP_CR_FROM_CPU 0

+

+struct SDSP

+{

+	u16 r[32];

+	u16 pc;

+#if PROFILE

+	u16 err_pc;

+#endif

+	u16 *iram;

+	u16 *dram;

+	u16 *irom;

+	u16 *coef;

+	u8  *cpu_ram;

+	u16 cr;

+	u8 reg_stack_ptr[4];

+	u8 exceptions;   // pending exceptions?

+	bool exception_in_progress_hack;  // is this the same as "exception enabled"?

+

+	// lets make stack depth to 32 for now

+	u16 reg_stack[4][DSP_STACK_DEPTH];

+	void (*irq_request)(void);

+

+	// for debugger only

+	u32 iram_crc;

+	u64 step_counter;

+};

+

+extern SDSP g_dsp;

+

+void gdsp_init();

+void gdsp_reset();

+void gdsp_shutdown();

+

+bool gdsp_load_irom(const char *filename);

+bool gdsp_load_coef(const char *filename);

+

+void gdsp_check_external_int();

+void gdsp_check_exceptions();

+

+// sets a flag in the pending exception register.

+void gdsp_generate_exception(u8 level);

+

+//}  // namespace

+

+#endif  // _DSPCORE_H

diff --git a/Source/Core/DSPCore/Src/SConscript b/Source/Core/DSPCore/Src/SConscript
index 19ca950856..6f577930b0 100644
--- a/Source/Core/DSPCore/Src/SConscript
+++ b/Source/Core/DSPCore/Src/SConscript
@@ -17,7 +17,7 @@ files = [
     "DSPJit.cpp",
     "DSPCodeUtil.cpp",
     "LabelMap.cpp",
-    #	"DSPHost.cpp",
+    "DSPCore.cpp",
     "DSPTables.cpp",
     ]
 
diff --git a/Source/Core/DSPCore/Src/gdsp_aram.cpp b/Source/Core/DSPCore/Src/gdsp_aram.cpp
index b3cb15d67e..1c6955e98b 100644
--- a/Source/Core/DSPCore/Src/gdsp_aram.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_aram.cpp
@@ -16,6 +16,7 @@
 // http://code.google.com/p/dolphin-emu/
 
 #include "Common.h"
+#include "DSPCore.h"
 #include "DSPHost.h"
 #include "gdsp_interface.h"
 #include "gdsp_interpreter.h"
diff --git a/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp b/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp
index 0db30bbfb3..a4f3767a62 100644
--- a/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp
@@ -22,6 +22,7 @@
 

 #include "gdsp_condition_codes.h"

 #include "gdsp_interpreter.h"

+#include "DSPCore.h"

 #include "DSPInterpreter.h"

 

 namespace DSPInterpreter {

diff --git a/Source/Core/DSPCore/Src/gdsp_ext_op.cpp b/Source/Core/DSPCore/Src/gdsp_ext_op.cpp
index 554d5a391b..4d0bde0ed2 100644
--- a/Source/Core/DSPCore/Src/gdsp_ext_op.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_ext_op.cpp
@@ -24,6 +24,7 @@
    ====================================================================*/
 
 #include "gdsp_opcodes_helper.h"
+#include "gdsp_memory.h"
 
 // Extended opcodes do not exist on their own. These opcodes can only be
 // attached to opcodes that allow extending (8 lower bits of opcode not used by
@@ -41,6 +42,7 @@
 
 namespace DSPInterpreter
 {
+
 namespace Ext 
 {
 
diff --git a/Source/Core/DSPCore/Src/gdsp_interface.cpp b/Source/Core/DSPCore/Src/gdsp_interface.cpp
index f5e864bcfa..225815c80f 100644
--- a/Source/Core/DSPCore/Src/gdsp_interface.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_interface.cpp
@@ -28,6 +28,7 @@
 #include "Thread.h"
 #include "MemoryUtil.h"
 
+#include "DSPCore.h"
 #include "DSPHost.h"
 #include "DSPAnalyzer.h"
 #include "gdsp_aram.h"
@@ -68,7 +69,6 @@ u32 gdsp_mbox_peek(u8 mbx)
 	return value;
 }
 
-
 void gdsp_mbox_write_h(u8 mbx, u16 val)
 {
 	if (DSPHost_OnThread())
diff --git a/Source/Core/DSPCore/Src/gdsp_interpreter.cpp b/Source/Core/DSPCore/Src/gdsp_interpreter.cpp
index 6dcfa019c9..ea816486dc 100644
--- a/Source/Core/DSPCore/Src/gdsp_interpreter.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_interpreter.cpp
@@ -27,158 +27,17 @@
 #include <stdlib.h>
 
 #include "DSPTables.h"
-#include "DSPAnalyzer.h"
 #include "DSPHost.h"
+#include "DSPCore.h"
+#include "DSPAnalyzer.h"
 
 #include "gdsp_interface.h"
 #include "gdsp_opcodes_helper.h"
-// #include "Tools.h"
-#include "MemoryUtil.h"
-
-//-------------------------------------------------------------------------------
 
-SDSP g_dsp;
+namespace DSPInterpreter {
 
 volatile u32 gdsp_running;
 
-static bool cr_halt = true;
-static bool cr_external_int = false;
-
-
-void UpdateCachedCR()
-{
-	cr_halt = (g_dsp.cr & 0x4) != 0;
-	cr_external_int = (g_dsp.cr & 0x02) != 0;
-}
-
-//-------------------------------------------------------------------------------
-
-void gdsp_init()
-{
-	g_dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);
-	g_dsp.iram = (u16*)AllocateMemoryPages(DSP_IRAM_BYTE_SIZE);
-	g_dsp.dram = (u16*)AllocateMemoryPages(DSP_DRAM_BYTE_SIZE);
-	g_dsp.coef = (u16*)AllocateMemoryPages(DSP_COEF_BYTE_SIZE);
-
-	// Fill roms with zeros. 
-	memset(g_dsp.irom, 0, DSP_IROM_BYTE_SIZE);
-	memset(g_dsp.coef, 0, DSP_COEF_BYTE_SIZE);
-
-	for (int i = 0; i < 32; i++)
-	{
-		g_dsp.r[i] = 0;
-	}
-
-	for (int i = 0; i < 4; i++)
-	{
-		g_dsp.reg_stack_ptr[i] = 0;
-
-		for (int j = 0; j < DSP_STACK_DEPTH; j++)
-		{
-			g_dsp.reg_stack[i][j] = 0;
-		}
-	}
-
-	// Fill IRAM with HALT opcodes.
-	for (int i = 0; i < DSP_IRAM_SIZE; i++)
-	{
-		g_dsp.iram[i] = 0x0021; // HALT opcode
-	}
-
-	// Just zero out DRAM.
-	for (int i = 0; i < DSP_DRAM_SIZE; i++)
-	{
-		g_dsp.dram[i] = 0x2100;
-	}
-
-	// copied from a real console after the custom UCode has been loaded
-	g_dsp.r[0x08] = 0xffff;
-	g_dsp.r[0x09] = 0xffff;
-	g_dsp.r[0x0a] = 0xffff;
-	g_dsp.r[0x0b] = 0xffff;
-
-	g_dsp.cr = 0x804;
-	gdsp_ifx_init();
-
-	UpdateCachedCR();
-
-	// Mostly keep IRAM write protected. We unprotect only when DMA-ing
-	// in new ucodes.
-	WriteProtectMemory(g_dsp.iram, DSP_IRAM_BYTE_SIZE, false);
-	DSPAnalyzer::Analyze();
-}
-
-void gdsp_shutdown()
-{
-	FreeMemoryPages(g_dsp.irom, DSP_IROM_BYTE_SIZE);
-	FreeMemoryPages(g_dsp.iram, DSP_IRAM_BYTE_SIZE);
-	FreeMemoryPages(g_dsp.dram, DSP_DRAM_BYTE_SIZE);
-	FreeMemoryPages(g_dsp.coef, DSP_COEF_BYTE_SIZE);
-}
-
-
-void gdsp_reset()
-{
-    _assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "reset while exception");
-    g_dsp.pc = DSP_RESET_VECTOR;
-    g_dsp.exception_in_progress_hack = false;
-}
-
-
-void gdsp_generate_exception(u8 level)
-{
-	g_dsp.exceptions |= 1 << level;
-}
-
-bool gdsp_load_irom(const char *fname)
-{
-	FILE *pFile = fopen(fname, "rb");
-	if (pFile)
-	{
-		size_t size_in_bytes = DSP_IROM_SIZE * sizeof(u16);
-		size_t read_bytes = fread(g_dsp.irom, 1, size_in_bytes, pFile);
-		if (read_bytes != size_in_bytes)
-		{
-			PanicAlert("IROM too short : %i/%i", (int)read_bytes, (int)size_in_bytes);
-			fclose(pFile);
-			return false;
-		}
-		fclose(pFile);
-	
-		// Byteswap the rom.
-		for (int i = 0; i < DSP_IROM_SIZE; i++)
-			g_dsp.irom[i] = Common::swap16(g_dsp.irom[i]);
-
-		return true;
-	}
-	// Always keep IROM write protected.
-	WriteProtectMemory(g_dsp.irom, DSP_IROM_BYTE_SIZE, false);
-	return false;
-}
-
-bool gdsp_load_coef(const char *fname)
-{
-	FILE *pFile = fopen(fname, "rb");
-	if (pFile)
-	{
-		size_t size_in_bytes = DSP_COEF_SIZE * sizeof(u16);
-		size_t read_bytes = fread(g_dsp.coef, 1, size_in_bytes, pFile);
-		if (read_bytes != size_in_bytes)
-		{
-			PanicAlert("COEF too short : %i/%i", (int)read_bytes, (int)size_in_bytes);
-			fclose(pFile);
-			return false;
-		}
-		fclose(pFile);
-		// Byteswap the rom.
-		for (int i = 0; i < DSP_IROM_SIZE; i++)
-			g_dsp.coef[i] = Common::swap16(g_dsp.coef[i]);
-		return true;
-	}
-	// Always keep COEF write protected. We unprotect only when DMA-ing
-	WriteProtectMemory(g_dsp.coef, DSP_COEF_BYTE_SIZE, false);
-	return false;
-}
 
 // Hm, should instructions that change CR use this? Probably not (but they
 // should call UpdateCachedCR())
@@ -194,8 +53,6 @@ void gdsp_write_cr(u16 val)
 
 	// update cr
 	g_dsp.cr = val;
-
-	UpdateCachedCR();
 }
 
 
@@ -211,49 +68,9 @@ u16 gdsp_read_cr()
 		g_dsp.cr &= ~0x800;
 	}
 
-	UpdateCachedCR();
-
 	return g_dsp.cr;
 }
 
-void gdsp_check_external_int()
-{
-	// check if there is an external interrupt
-	if (cr_external_int)
-	{
-		if (dsp_SR_is_flag_set(FLAG_ENABLE_INTERUPT) && (g_dsp.exception_in_progress_hack == false))
-		{
-			// level 7 is the interrupt exception
-			gdsp_generate_exception(7);
-			g_dsp.cr &= ~0x0002;
-			UpdateCachedCR();
-		}
-	}
-}
-
-void gdsp_check_exceptions()
-{
-	// check exceptions
-	if ((g_dsp.exceptions != 0) && (!g_dsp.exception_in_progress_hack))
-	{
-		for (int i = 0; i < 8; i++)
-		{
-			if (g_dsp.exceptions & (1 << i))
-			{
-				_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
-
-				dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
-				dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
-
-				g_dsp.pc = i * 2;
-				g_dsp.exceptions &= ~(1 << i);
-
-				g_dsp.exception_in_progress_hack = true;
-				break;
-			}
-		}
-	}
-}
 
 void gdsp_handle_loop()
 {
@@ -313,7 +130,7 @@ void gdsp_step()
 void gdsp_run()
 {
 	gdsp_running = true;
-	while (!cr_halt)
+	while (!(g_dsp.cr & CR_HALT))
 	{
 		// Are we running?
 		if (DSPHost_Running())
@@ -321,7 +138,7 @@ void gdsp_run()
 
 		gdsp_check_external_int();
 		// This number (500) is completely arbitrary. TODO: tweak.
-		for (int i = 0; i < 500 && !cr_halt; i++)
+		for (int i = 0; i < 500 && !(g_dsp.cr & CR_HALT); i++)
 			gdsp_step();
 
 		if (!gdsp_running)
@@ -338,7 +155,7 @@ void gdsp_run_cycles(int cycles)
 	// First, let's run a few cycles with no idle skipping so that things can progress a bit.
 	for (int i = 0; i < 8; i++)
 	{
-		if (cr_halt)
+		if (g_dsp.cr & CR_HALT)
 			return;
 		gdsp_step();
 		cycles--;
@@ -347,7 +164,7 @@ void gdsp_run_cycles(int cycles)
 	// Next, let's run a few cycles with idle skipping, so that we can skip loops.
 	for (int i = 0; i < 8; i++)
 	{
-		if (cr_halt)
+		if (g_dsp.cr & CR_HALT)
 			return;
 		if (DSPAnalyzer::code_flags[g_dsp.pc] & DSPAnalyzer::CODE_IDLE_SKIP)
 			return;
@@ -370,3 +187,5 @@ void gdsp_stop()
 {
 	gdsp_running = false;
 }
+
+}  // namespace
\ No newline at end of file
diff --git a/Source/Core/DSPCore/Src/gdsp_interpreter.h b/Source/Core/DSPCore/Src/gdsp_interpreter.h
index a5d3fb9044..06869b4004 100644
--- a/Source/Core/DSPCore/Src/gdsp_interpreter.h
+++ b/Source/Core/DSPCore/Src/gdsp_interpreter.h
@@ -45,68 +45,7 @@
 
 #include "Common.h"
 
-#define DSP_IRAM_BYTE_SIZE   0x2000
-#define DSP_IRAM_SIZE        0x1000
-#define DSP_IRAM_MASK        0x0fff
-
-#define DSP_IROM_BYTE_SIZE   0x2000
-#define DSP_IROM_SIZE        0x1000
-#define DSP_IROM_MASK        0x0fff
-
-#define DSP_DRAM_BYTE_SIZE   0x2000
-#define DSP_DRAM_SIZE        0x1000
-#define DSP_DRAM_MASK        0x0fff
-
-#define DSP_COEF_BYTE_SIZE   0x2000
-#define DSP_COEF_SIZE        0x1000
-#define DSP_COEF_MASK        0x0fff
-
-#define DSP_RESET_VECTOR     0x8000
-
-#define DSP_STACK_DEPTH 0x20
-#define DSP_STACK_MASK  0x1f
-
-#define DSP_CR_IMEM     2
-#define DSP_CR_DMEM     0
-#define DSP_CR_TO_CPU   1
-#define DSP_CR_FROM_CPU 0
-
-struct SDSP
-{
-	u16 r[32];
-	u16 pc;
-#if PROFILE
-	u16 err_pc;
-#endif
-	u16* iram;
-	u16* dram;
-	u16* irom;
-	u16* coef;
-	u8* cpu_ram;
-	u16 cr;
-	u8 reg_stack_ptr[4];
-	u8 exceptions;   // pending exceptions?
-	bool exception_in_progress_hack;  // is this the same as "exception enabled"?
-
-	// lets make stack depth to 32 for now
-	u16 reg_stack[4][DSP_STACK_DEPTH];
-	void (* irq_request)(void);
-
-	// for debugger only
-	u32 iram_crc;
-	u64 step_counter;
-};
-
-extern SDSP g_dsp;
-
-
-void gdsp_init();
-void gdsp_reset();
-void gdsp_shutdown();
-
-bool gdsp_load_irom(const char *fname);
-bool gdsp_load_coef(const char *fname);
-
+namespace DSPInterpreter {
 
 // steps through DSP code, returns false if error occured
 void gdsp_step();
@@ -118,7 +57,6 @@ void gdsp_stop();
 void gdsp_write_cr(u16 val);
 u16  gdsp_read_cr();
 
-// sets a flag in the pending exception register.
-void gdsp_generate_exception(u8 level);
+}  // namespace
 
 #endif
diff --git a/Source/Core/DSPCore/Src/gdsp_memory.cpp b/Source/Core/DSPCore/Src/gdsp_memory.cpp
index ef2b3beefb..46ca4a98d5 100644
--- a/Source/Core/DSPCore/Src/gdsp_memory.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_memory.cpp
@@ -29,6 +29,8 @@
 #include "gdsp_memory.h"
 #include "gdsp_interface.h"
 
+#include "DSPCore.h"
+
 u16 dsp_imem_read(u16 addr)
 {
 	switch (addr >> 12)
diff --git a/Source/Core/DSPCore/Src/gdsp_memory.h b/Source/Core/DSPCore/Src/gdsp_memory.h
index 2318eb4c58..21a2d648f0 100644
--- a/Source/Core/DSPCore/Src/gdsp_memory.h
+++ b/Source/Core/DSPCore/Src/gdsp_memory.h
@@ -27,6 +27,7 @@
 
 #include "Common.h"
 #include "gdsp_interpreter.h"
+#include "DSPCore.h"
 
 u16  dsp_imem_read(u16 addr);
 void dsp_dmem_write(u16 addr, u16 val);
diff --git a/Source/Core/DSPCore/Src/gdsp_opcodes_helper.h b/Source/Core/DSPCore/Src/gdsp_opcodes_helper.h
index e1bbc236ed..a53902be17 100644
--- a/Source/Core/DSPCore/Src/gdsp_opcodes_helper.h
+++ b/Source/Core/DSPCore/Src/gdsp_opcodes_helper.h
@@ -29,18 +29,17 @@
 #include "Common.h"
 
 #include "DSPInterpreter.h"
+#include "DSPCore.h"
 
 #include "gdsp_memory.h"
 #include "gdsp_interpreter.h"
 #include "gdsp_registers.h"
 #include "gdsp_ext_op.h"
 
+
 // ---------------------------------------------------------------------------------------
-//
 // --- SR
-//
 // ---------------------------------------------------------------------------------------
-
 inline void dsp_SR_set_flag(int flag)
 {
 	g_dsp.r[DSP_REG_SR] |= (1 << flag);
@@ -51,45 +50,34 @@ inline bool dsp_SR_is_flag_set(int flag)
 	return (g_dsp.r[DSP_REG_SR] & (1 << flag)) != 0;
 }
 
-
 // ---------------------------------------------------------------------------------------
-//
 // --- reg
-//
 // ---------------------------------------------------------------------------------------
 
 inline u16 dsp_op_read_reg(u8 reg)
 {
-	u16 val;
-	
 	switch (reg & 0x1f) {
 	case 0x0c:
 	case 0x0d:
 	case 0x0e:
 	case 0x0f:
-
-		val = dsp_reg_load_stack(reg - 0x0c);
-		break;
-
+		return dsp_reg_load_stack(reg - 0x0c);
 	default:
-		val = g_dsp.r[reg];
-		break;
+		return g_dsp.r[reg];
 	}
-
-	return val;
 }
 
-
 inline void dsp_op_write_reg(u8 reg, u16 val)
 {
 	switch (reg & 0x1f) {
-		/*
+	// 8-bit sign extended registers. Should look at prod.h too...
 	case DSP_REG_ACH0:
 	case DSP_REG_ACH1:
 		// sign extend from the bottom 8 bits.
 		g_dsp.r[reg] = (u16)(s16)(s8)(u8)val;
 		break;
-*/
+
+	// Stack registers.
 	case 0x0c:
 	case 0x0d:
 	case 0x0e:
@@ -105,7 +93,6 @@ inline void dsp_op_write_reg(u8 reg, u16 val)
 
 inline void dsp_conditional_extend_accum(u8 reg) 
 {
-#if 0
 	switch (reg) 
 	{
 	case DSP_REG_ACM0:
@@ -118,7 +105,6 @@ inline void dsp_conditional_extend_accum(u8 reg)
 			g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACL0] = 0;
 		}
 	}
-#endif
 }
 
 
@@ -166,7 +152,7 @@ inline void dsp_set_long_prod(s64 val)
 }
 
 // ---------------------------------------------------------------------------------------
-// --- acc
+// --- ACC - main accumulators (40-bit)
 // ---------------------------------------------------------------------------------------
 
 inline s64 dsp_get_long_acc(int reg)
@@ -218,12 +204,9 @@ inline s16 dsp_get_acc_h(int _reg)
 
 
 // ---------------------------------------------------------------------------------------
-//
-// --- acx
-//
+// --- AX - extra accumulators (32-bit)
 // ---------------------------------------------------------------------------------------
 
-
 inline s64 dsp_get_long_acx(int _reg)
 {
 #if PROFILE
diff --git a/Source/Core/DSPCore/Src/gdsp_registers.cpp b/Source/Core/DSPCore/Src/gdsp_registers.cpp
index f0bec2b5f9..ed6cef1685 100644
--- a/Source/Core/DSPCore/Src/gdsp_registers.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_registers.cpp
@@ -24,6 +24,9 @@
    ====================================================================*/
 
 #include "Common.h"
+
+#include "DSPCore.h"
+
 #include "gdsp_registers.h"
 #include "gdsp_interpreter.h"
 
@@ -54,4 +57,4 @@ u16 dsp_reg_load_stack(u8 stack_reg)
 	u16 val = g_dsp.r[DSP_REG_ST0 + stack_reg];
 	dsp_reg_stack_pop(stack_reg);
 	return val;
-}
+}
\ No newline at end of file
diff --git a/Source/Core/DSPCore/Src/gdsp_registers.h b/Source/Core/DSPCore/Src/gdsp_registers.h
index 473f5993b8..8b60e02183 100644
--- a/Source/Core/DSPCore/Src/gdsp_registers.h
+++ b/Source/Core/DSPCore/Src/gdsp_registers.h
@@ -85,7 +85,6 @@
 #define DSP_REG_CMBH        0xfffe  // CPU Mailbox H
 #define DSP_REG_CMBL        0xffff  // CPU Mailbox L
 
-
 #define DMA_TO_DSP          0
 #define DMA_TO_CPU          1
 
@@ -93,6 +92,11 @@
 #define DSP_STACK_C 0
 #define DSP_STACK_D 1
 
+
+// CR bits
+#define CR_HALT         0x0004
+#define CR_EXTERNAL_INT 0x0002
+
 // SR bits
 #define SR_CARRY       0x0001
 #define SR_2           0x0002   // overflow???