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authornakeee <nakeee@gmail.com>2009-05-01 09:26:47 +0000
committernakeee <nakeee@gmail.com>2009-05-01 09:26:47 +0000
commite39f0f9ce88229a94b2a034db0571545be58dc6a (patch)
tree55f1496af8ccfed2d799d90b8a43d73e839ddaf3 /Source/Core/DSPCore
parentc49f519d12ebc24cd0f34c3b0a89a0dc4d8d25c6 (diff)
DSP: reverting some condition code until we handle 0x1 and 0x2 correctly
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3115 8ced0084-cf51-0410-be5f-012b33b47a6e
Diffstat (limited to 'Source/Core/DSPCore')
-rw-r--r--Source/Core/DSPCore/Src/gdsp_condition_codes.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp b/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp
index f60e083be0..0437247bb2 100644
--- a/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp
+++ b/Source/Core/DSPCore/Src/gdsp_condition_codes.cpp
@@ -136,12 +136,16 @@ bool CheckCondition(u8 _Condition)
break;
case 0x6: // L - LESS
- if (g_dsp.r[DSP_REG_SR] & 0x02)
+ // Should be that once we set 0x02
+ // if (g_dsp.r[DSP_REG_SR] & 0x02)
+ if (isSign())
taken = true;
break;
case 0x7: // GE - GREATER EQUAL
- if (g_dsp.r[DSP_REG_SR] & SR_CARRY)
+ // Should be that once we set 0x01
+ // if (g_dsp.r[DSP_REG_SR] & SR_CARRY)
+ if (! isSign() || isZero())
taken = true;
break;