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| author | Sintendo <bram.speeckaert@gmail.com> | 2020-11-16 23:54:54 +0100 |
|---|---|---|
| committer | Sintendo <bram.speeckaert@gmail.com> | 2020-12-25 19:30:51 +0100 |
| commit | 17dc870847ba65a5c8aceeafd21fe7623d042c42 (patch) | |
| tree | d527f50660980a5476118debd057ba0e886c3994 /Source/Core/InputCommon/ControllerInterface/DualShockUDPClient/DualShockUDPClient.cpp | |
| parent | 17db359979587c588d549e3f31dc8994c96abd8b (diff) | |
Jit64: slwx - Optimize shift by constant
More efficient code can be generated if the shift amount is known at
compile time. Similar optimizations were present in JitArm64 already,
but were missing in Jit64.
- By using an 8-bit immediate we can eliminate the need for ECX as a
scratch register, thereby reducing register pressure and occasionally
eliminating a spill.
Before:
B9 18 00 00 00 mov ecx,18h
41 8B F7 mov esi,r15d
48 D3 E6 shl rsi,cl
8B F6 mov esi,esi
After:
41 8B CF mov ecx,r15d
C1 E1 18 shl ecx,18h
- PowerPC has strange shift amount masking behavior which is emulated
using 64-bit shifts, even though we only care about a 32-bit result.
If the shift amount is known, we can handle this special case
separately, and use 32-bit shift instructions otherwise. We also no
longer need to clear the upper 32 bits of the register.
Before:
BE F8 FF FF FF mov esi,0FFFFFFF8h
8B CE mov ecx,esi
41 8B F4 mov esi,r12d
48 D3 E6 shl rsi,cl
8B F6 mov esi,esi
After:
Nothing, register is set to constant zero.
- A shift by zero becomes a simple MOV.
Before:
BE 00 00 00 00 mov esi,0
8B CE mov ecx,esi
41 8B F3 mov esi,r11d
48 D3 E6 shl rsi,cl
8B F6 mov esi,esi
After:
41 8B FB mov edi,r11d
Diffstat (limited to 'Source/Core/InputCommon/ControllerInterface/DualShockUDPClient/DualShockUDPClient.cpp')
0 files changed, 0 insertions, 0 deletions
