VertexLoaderARM64: Optimize RGBA6666

This commit replaces the old instruction sequence with one that is
considerably shorter. Main ideas are as follows:

 - Use AND with constant mask to isolate the needed bits.
 - Use ORR + LSL/LSR to shirt the bits into position and combine in one
   instruction where possible.
 - Red and alpha are already sequential, so don't need to wait for the
   byteswap.
 - Do the expansion from 6 to 8 bits at the end for all 4 components
   in one step.

Before:

ldur   w14, [x0]
rev    w14, w14
ubfx   w15, w14, #0, #6
orr    w15, wzr, w15, lsl #2
orr    w15, w15, w15, lsr #6
orr    w16, wzr, w15, lsl #24
ubfx   w15, w14, #6, #6
orr    w15, wzr, w15, lsl #2
orr    w15, w15, w15, lsr #6
orr    w16, w16, w15, lsl #16
ubfx   w15, w14, #12, #6
orr    w15, wzr, w15, lsl #2
orr    w15, w15, w15, lsr #6
orr    w16, w16, w15, lsl #8
ubfx   w15, w14, #18, #6
orr    w16, w16, w15, lsl #2
orr    w16, w16, w15, lsr #4
str    w16, [x1, #0xc]

After:

ldur   w14, [x0]
rev    w15, w14
and    w16, w14, #0xfc00
and    w14, w14, #0x3f000000
lsr    w16, w16, #8
orr    w16, w16, w14, lsl #2
and    w14, w15, #0xfc0
and    w15, w15, #0x3f000
orr    w15, w15, w14, lsl #14
orr    w16, w16, w15, lsr #2
and    w15, w16, #0xc0c0c0c0
orr    w16, w16, w15, lsr #6
str    w16, [x1, #0xc]

0 files changed, 0 insertions, 0 deletions