Merge pull request #54 from lioncash/cleanup

Cleanup mismatching struct/enum indentations.

1 files changed, 41 insertions, 41 deletions

diff --git a/Source/Core/VideoBackends/Software/SWCommandProcessor.h b/Source/Core/VideoBackends/Software/SWCommandProcessor.h
index c2381a2d36..8273af2f31 100644
--- a/Source/Core/VideoBackends/Software/SWCommandProcessor.h
+++ b/Source/Core/VideoBackends/Software/SWCommandProcessor.h
@@ -17,30 +17,30 @@ namespace SWCommandProcessor
 	// internal hardware addresses
 	enum
 	{
-		STATUS_REGISTER				= 0x00,
-		CTRL_REGISTER				= 0x02,
-		CLEAR_REGISTER				= 0x04,
-		FIFO_TOKEN_REGISTER			= 0x0E,
-		FIFO_BOUNDING_BOX_LEFT		= 0x10,
-		FIFO_BOUNDING_BOX_RIGHT		= 0x12,
-		FIFO_BOUNDING_BOX_TOP		= 0x14,
-		FIFO_BOUNDING_BOX_BOTTOM	= 0x16,
-		FIFO_BASE_LO				= 0x20,
-		FIFO_BASE_HI				= 0x22,
-		FIFO_END_LO					= 0x24,
-		FIFO_END_HI					= 0x26,
-		FIFO_HI_WATERMARK_LO		= 0x28,
-		FIFO_HI_WATERMARK_HI		= 0x2a,
-		FIFO_LO_WATERMARK_LO		= 0x2c,
-		FIFO_LO_WATERMARK_HI		= 0x2e,
-		FIFO_RW_DISTANCE_LO			= 0x30,
-		FIFO_RW_DISTANCE_HI			= 0x32,
-		FIFO_WRITE_POINTER_LO		= 0x34,
-		FIFO_WRITE_POINTER_HI		= 0x36,
-		FIFO_READ_POINTER_LO		= 0x38,
-		FIFO_READ_POINTER_HI		= 0x3A,
-		FIFO_BP_LO					= 0x3C,
-		FIFO_BP_HI					= 0x3E
+		STATUS_REGISTER          = 0x00,
+		CTRL_REGISTER            = 0x02,
+		CLEAR_REGISTER           = 0x04,
+		FIFO_TOKEN_REGISTER      = 0x0E,
+		FIFO_BOUNDING_BOX_LEFT   = 0x10,
+		FIFO_BOUNDING_BOX_RIGHT  = 0x12,
+		FIFO_BOUNDING_BOX_TOP    = 0x14,
+		FIFO_BOUNDING_BOX_BOTTOM = 0x16,
+		FIFO_BASE_LO             = 0x20,
+		FIFO_BASE_HI             = 0x22,
+		FIFO_END_LO              = 0x24,
+		FIFO_END_HI              = 0x26,
+		FIFO_HI_WATERMARK_LO     = 0x28,
+		FIFO_HI_WATERMARK_HI     = 0x2a,
+		FIFO_LO_WATERMARK_LO     = 0x2c,
+		FIFO_LO_WATERMARK_HI     = 0x2e,
+		FIFO_RW_DISTANCE_LO      = 0x30,
+		FIFO_RW_DISTANCE_HI      = 0x32,
+		FIFO_WRITE_POINTER_LO    = 0x34,
+		FIFO_WRITE_POINTER_HI    = 0x36,
+		FIFO_READ_POINTER_LO     = 0x38,
+		FIFO_READ_POINTER_HI     = 0x3A,
+		FIFO_BP_LO               = 0x3C,
+		FIFO_BP_HI               = 0x3E
 	};
 
 	// Fifo Status Register
@@ -48,12 +48,12 @@ namespace SWCommandProcessor
 	{
 		struct
 		{
-			u16 OverflowHiWatermark	:	1;
-			u16 UnderflowLoWatermark:	1;
-			u16 ReadIdle			:	1; // done reading
-			u16 CommandIdle			:	1; // done processing commands
-			u16 Breakpoint			:	1;
-			u16						:	11;
+			u16 OverflowHiWatermark  : 1;
+			u16 UnderflowLoWatermark : 1;
+			u16 ReadIdle             : 1; // done reading
+			u16 CommandIdle          : 1; // done processing commands
+			u16 Breakpoint           : 1;
+			u16                      : 11;
 		};
 		u16 Hex;
 		UCPStatusReg() {Hex = 0; }
@@ -65,13 +65,13 @@ namespace SWCommandProcessor
 	{
 		struct
 		{
-			u16 GPReadEnable			:	1;
-			u16 BPEnable				:	1;
-			u16 FifoOverflowIntEnable	:	1;
-			u16 FifoUnderflowIntEnable	:	1;
-			u16 GPLinkEnable			:	1;
-			u16 BreakPointIntEnable		:	1;
-			u16							:	10;
+			u16 GPReadEnable           : 1;
+			u16 BPEnable               : 1;
+			u16 FifoOverflowIntEnable  : 1;
+			u16 FifoUnderflowIntEnable : 1;
+			u16 GPLinkEnable           : 1;
+			u16 BreakPointIntEnable    : 1;
+			u16                        : 10;
 		};
 		u16 Hex;
 		UCPCtrlReg() {Hex = 0; }
@@ -83,10 +83,10 @@ namespace SWCommandProcessor
 	{
 		struct
 		{
-			u16 ClearFifoOverflow		:	1;
-			u16 ClearFifoUnderflow		:	1;
-			u16 ClearMetrices			:	1;
-			u16							:	13;
+			u16 ClearFifoOverflow  : 1;
+			u16 ClearFifoUnderflow : 1;
+			u16 ClearMetrices      : 1;
+			u16                    : 13;
 		};
 		u16 Hex;
 		UCPClearReg() {Hex = 0; }