diff options
| author | skidau <skidau@gmail.com> | 2014-09-29 13:52:33 +1000 |
|---|---|---|
| committer | skidau <skidau@gmail.com> | 2014-09-29 13:52:33 +1000 |
| commit | 007ba13cfab6d0f0be693d45be2ea00350bb3aac (patch) | |
| tree | ad41a8f2b2191091cd6d880a2c88e4fa4c3ad63e /Source/Core/VideoCommon/CommandProcessor.cpp | |
| parent | c7f38583790be791c2767301c21b8e45eb6fb52c (diff) | |
| parent | 8c5e12cf028bfcc873b053e8a7f428a9d52ff333 (diff) | |
Merge pull request #1144 from skidau/fifo-linked
Moved the linking of the FIFO CPWritePointer near where CPWritePointer gets updated
Diffstat (limited to 'Source/Core/VideoCommon/CommandProcessor.cpp')
| -rw-r--r-- | Source/Core/VideoCommon/CommandProcessor.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/Source/Core/VideoCommon/CommandProcessor.cpp b/Source/Core/VideoCommon/CommandProcessor.cpp index 6f8997cc58..0c74a4614f 100644 --- a/Source/Core/VideoCommon/CommandProcessor.cpp +++ b/Source/Core/VideoCommon/CommandProcessor.cpp @@ -335,6 +335,13 @@ void STACKALIGN GatherPipeBursted() else fifo.CPWritePointer += GATHER_PIPE_SIZE; + if (m_CPCtrlReg.GPReadEnable && m_CPCtrlReg.GPLinkEnable) + { + ProcessorInterface::Fifo_CPUWritePointer = fifo.CPWritePointer; + ProcessorInterface::Fifo_CPUBase = fifo.CPBase; + ProcessorInterface::Fifo_CPUEnd = fifo.CPEnd; + } + Common::AtomicAdd(fifo.CPReadWriteDistance, GATHER_PIPE_SIZE); RunGpu(); @@ -495,13 +502,6 @@ void SetCpControlRegister() fifo.bFF_LoWatermarkInt = m_CPCtrlReg.FifoUnderflowIntEnable; fifo.bFF_GPLinkEnable = m_CPCtrlReg.GPLinkEnable; - if (m_CPCtrlReg.GPReadEnable && m_CPCtrlReg.GPLinkEnable) - { - ProcessorInterface::Fifo_CPUWritePointer = fifo.CPWritePointer; - ProcessorInterface::Fifo_CPUBase = fifo.CPBase; - ProcessorInterface::Fifo_CPUEnd = fifo.CPEnd; - } - if (fifo.bFF_GPReadEnable && !m_CPCtrlReg.GPReadEnable) { fifo.bFF_GPReadEnable = m_CPCtrlReg.GPReadEnable; |
