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authorStenzek <stenzek@gmail.com>2021-04-17 15:54:50 +1000
committerStenzek <stenzek@gmail.com>2021-04-18 03:24:01 +1000
commite3ac5dca3218e62636659624b65a9ff599fee150 (patch)
tree9e51bbba699f26e4d3ef189a3c23a3b3a2e7ba3c /Source/Core/VideoCommon/CommandProcessor.cpp
parent53222560650e4a99eceafcd537d4e04d1c50b3a6 (diff)
Fifo: Run/sync with the GPU on command processor register access
Diffstat (limited to 'Source/Core/VideoCommon/CommandProcessor.cpp')
-rw-r--r--Source/Core/VideoCommon/CommandProcessor.cpp52
1 files changed, 32 insertions, 20 deletions
diff --git a/Source/Core/VideoCommon/CommandProcessor.cpp b/Source/Core/VideoCommon/CommandProcessor.cpp
index 4694860787..0ad2bf2cea 100644
--- a/Source/Core/VideoCommon/CommandProcessor.cpp
+++ b/Source/Core/VideoCommon/CommandProcessor.cpp
@@ -234,6 +234,7 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
}
mmio->Register(base | STATUS_REGISTER, MMIO::ComplexRead<u16>([](u32) {
+ Fifo::SyncGPUForRegisterAccess();
SetCpStatusRegister();
return m_CPStatusReg.Hex;
}),
@@ -271,18 +272,21 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
MMIO::DirectWrite<u16>(MMIO::Utils::LowPart(&fifo.CPReadWriteDistance),
WMASK_LO_ALIGN_32BIT));
mmio->Register(base | FIFO_RW_DISTANCE_HI,
- IsOnThread() ?
- MMIO::ComplexRead<u16>([](u32) {
- if (fifo.CPWritePointer >= fifo.SafeCPReadPointer)
- return ReadHigh(fifo.CPWritePointer - fifo.SafeCPReadPointer);
- else
- return ReadHigh(fifo.CPEnd - fifo.SafeCPReadPointer + fifo.CPWritePointer -
- fifo.CPBase + 32);
- }) :
- MMIO::DirectRead<u16>(MMIO::Utils::HighPart(&fifo.CPReadWriteDistance)),
+ IsOnThread() ? MMIO::ComplexRead<u16>([](u32) {
+ Fifo::SyncGPUForRegisterAccess();
+ if (fifo.CPWritePointer >= fifo.SafeCPReadPointer)
+ return ReadHigh(fifo.CPWritePointer - fifo.SafeCPReadPointer);
+ else
+ return ReadHigh(fifo.CPEnd - fifo.SafeCPReadPointer + fifo.CPWritePointer -
+ fifo.CPBase + 32);
+ }) :
+ MMIO::ComplexRead<u16>([](u32) {
+ Fifo::SyncGPUForRegisterAccess();
+ return ReadHigh(fifo.CPReadWriteDistance);
+ }),
MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](u32, u16 val) {
+ Fifo::SyncGPUForRegisterAccess();
WriteHigh(fifo.CPReadWriteDistance, val & WMASK_HI_RESTRICT);
- Fifo::SyncGPU(Fifo::SyncGPUReason::Other);
Fifo::RunGpu();
}));
mmio->Register(
@@ -290,16 +294,24 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
IsOnThread() ? MMIO::DirectRead<u16>(MMIO::Utils::LowPart(&fifo.SafeCPReadPointer)) :
MMIO::DirectRead<u16>(MMIO::Utils::LowPart(&fifo.CPReadPointer)),
MMIO::DirectWrite<u16>(MMIO::Utils::LowPart(&fifo.CPReadPointer), WMASK_LO_ALIGN_32BIT));
- mmio->Register(
- base | FIFO_READ_POINTER_HI,
- IsOnThread() ? MMIO::DirectRead<u16>(MMIO::Utils::HighPart(&fifo.SafeCPReadPointer)) :
- MMIO::DirectRead<u16>(MMIO::Utils::HighPart(&fifo.CPReadPointer)),
- IsOnThread() ?
- MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](u32, u16 val) {
- WriteHigh(fifo.CPReadPointer, val & WMASK_HI_RESTRICT);
- fifo.SafeCPReadPointer = fifo.CPReadPointer;
- }) :
- MMIO::DirectWrite<u16>(MMIO::Utils::HighPart(&fifo.CPReadPointer), WMASK_HI_RESTRICT));
+ mmio->Register(base | FIFO_READ_POINTER_HI,
+ IsOnThread() ? MMIO::ComplexRead<u16>([](u32) {
+ Fifo::SyncGPUForRegisterAccess();
+ return ReadHigh(fifo.SafeCPReadPointer);
+ }) :
+ MMIO::ComplexRead<u16>([](u32) {
+ Fifo::SyncGPUForRegisterAccess();
+ return ReadHigh(fifo.CPReadPointer);
+ }),
+ IsOnThread() ? MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](u32, u16 val) {
+ Fifo::SyncGPUForRegisterAccess();
+ WriteHigh(fifo.CPReadPointer, val & WMASK_HI_RESTRICT);
+ fifo.SafeCPReadPointer = fifo.CPReadPointer;
+ }) :
+ MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](u32, u16 val) {
+ Fifo::SyncGPUForRegisterAccess();
+ WriteHigh(fifo.CPReadPointer, val & WMASK_HI_RESTRICT);
+ }));
}
void GatherPipeBursted()