[AArch64] Optimize slowmem paired stores.

This came up from the discussion we were having prior about dumping half of a kilobyte of VFP registers to the stack is insanity.
This was due to me basically copying exactly what I did on ARMv7's paired loadstores, where the impact is less since we only use the bottom 64bits of
the VFP registers.

So I decided to think about how to improve upon this since I got called out on my terrible code.
The solution I have come up with is instead of jumping to the common ASM routine and having that check if it needs to take the fastmem or slowmem
routes, just inline the check in to the JIT block and jump to either a fastmem or slowmem handler.
Fairly simple, and this allows us to only flush the registers that are required when doing so. Should give a reasonable increase in performance for
games that use the slowmem path quite a lot.

0 files changed, 0 insertions, 0 deletions