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| author | JMC47 <JMC4789@gmail.com> | 2021-03-07 00:21:11 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-03-07 00:21:11 -0500 |
| commit | 089250fde65c2e225681c0ef6917d28fa187e8de (patch) | |
| tree | bcbb6db025c6003bd681e0028f0bc3b7b223bd07 /Source/Core/VideoCommon/RenderState.h | |
| parent | 5f7d935b0a40f5cece7341927bd92b6a8d5debbe (diff) | |
| parent | df81210e96c6603d3aeb6c76f51b030d06cd06ac (diff) | |
Merge pull request #9497 from Pokechu22/better-fifo-analyzer
Graphics refactoring + add names and descriptions in FIFO analyzer
Diffstat (limited to 'Source/Core/VideoCommon/RenderState.h')
| -rw-r--r-- | Source/Core/VideoCommon/RenderState.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/Source/Core/VideoCommon/RenderState.h b/Source/Core/VideoCommon/RenderState.h index f5bf085d72..1cc87eea51 100644 --- a/Source/Core/VideoCommon/RenderState.h +++ b/Source/Core/VideoCommon/RenderState.h @@ -28,7 +28,7 @@ union RasterizationState bool operator==(const RasterizationState& rhs) const { return hex == rhs.hex; } bool operator!=(const RasterizationState& rhs) const { return hex != rhs.hex; } bool operator<(const RasterizationState& rhs) const { return hex < rhs.hex; } - BitField<0, 2, GenMode::CullMode> cullmode; + BitField<0, 2, CullMode> cullmode; BitField<3, 2, PrimitiveType> primitive; u32 hex; @@ -59,7 +59,7 @@ union DepthState bool operator<(const DepthState& rhs) const { return hex < rhs.hex; } BitField<0, 1, u32> testenable; BitField<1, 1, u32> updateenable; - BitField<2, 3, ZMode::CompareMode> func; + BitField<2, 3, CompareMode> func; u32 hex; }; @@ -85,11 +85,11 @@ union BlendingState BitField<5, 1, u32> subtract; BitField<6, 1, u32> subtractAlpha; BitField<7, 1, u32> usedualsrc; - BitField<8, 3, BlendMode::BlendFactor> dstfactor; - BitField<11, 3, BlendMode::BlendFactor> srcfactor; - BitField<14, 3, BlendMode::BlendFactor> dstfactoralpha; - BitField<17, 3, BlendMode::BlendFactor> srcfactoralpha; - BitField<20, 4, BlendMode::LogicOp> logicmode; + BitField<8, 3, DstBlendFactor> dstfactor; + BitField<11, 3, SrcBlendFactor> srcfactor; + BitField<14, 3, DstBlendFactor> dstfactoralpha; + BitField<17, 3, SrcBlendFactor> srcfactoralpha; + BitField<20, 4, LogicOp> logicmode; u32 hex; }; |
