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authorcomex <comexk@gmail.com>2014-09-02 18:54:46 -0400
committercomex <comexk@gmail.com>2014-09-06 13:16:20 -0400
commit8dea26762dcc842ebcb227c0b9b9bbefc487624c (patch)
treefdeabf813c9489f3c2141ecf51a97d07b9a66e75 /Source/Core/VideoCommon/TextureDecoder_x64.cpp
parent67cdb6e07a9c1c3ddbfd6e61036756259344e289 (diff)
Rationalize temporary register usage.
Rather than using a variety of registers including RSI, ABI_PARAM1 (either RCX or RDI), RCX, and RDX, the rule is: - RDI and RSI are never used. This allows them to be allocated on Unix, bringing parity with Windows. - RDX is a permanent temporary register along with RAX (and is thus not FlushLocked). It's used frequently enough that allocating it would probably be a bad idea, as it would constantly get flushed. - RCX is allocatable, but is flushed in two situations: - Non-immediate shifts (rlwnm), because x86 requires RCX to be used. - Paired single loads and stores, because they require three temporary registers: the helper functions take two integer arguments, and another register is used as an index to get the function address. These should be relatively rare. While we're at it, in stores, use the registers directly where possible rather than always using temporaries (by making SafeWriteRegToReg clobber less). The address doesn't need to be clobbered in the usual case, and on CPUs with MOVBE, neither does the value. Oh, and get rid of a useless MEMCHECK. This commit does not actually add new registers to the allocation order; it is intended to test for any performance or correctness issues separately.
Diffstat (limited to 'Source/Core/VideoCommon/TextureDecoder_x64.cpp')
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