diff options
| author | pierre <pierre@pirsoft.de> | 2010-05-22 16:54:34 +0000 |
|---|---|---|
| committer | pierre <pierre@pirsoft.de> | 2010-05-22 16:54:34 +0000 |
| commit | e07a91930df0ac5b71cd2e0beb654e57e78b72dc (patch) | |
| tree | 843f4973bb64eedba8c8a1bac4b41ab6a3e212c0 /Source/Core/VideoCommon | |
| parent | ab89decac5c08c4eb4114535391332e0a0312d5f (diff) | |
The result of the last texenv stage is used regardless of destination register
The real hardware probably always sends the result of its computations
to the alpha test/fog units, in parallel to its registers, but those
only take the result of the last texenv stage.
This makes grass show up in ZTP, where the last texenv stage oddly writes to
reg #3 instead of #0.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5462 8ced0084-cf51-0410-be5f-012b33b47a6e
Diffstat (limited to 'Source/Core/VideoCommon')
| -rw-r--r-- | Source/Core/VideoCommon/Src/PixelShaderGen.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/Source/Core/VideoCommon/Src/PixelShaderGen.cpp b/Source/Core/VideoCommon/Src/PixelShaderGen.cpp index 5d9d7b82e6..40526bd1da 100644 --- a/Source/Core/VideoCommon/Src/PixelShaderGen.cpp +++ b/Source/Core/VideoCommon/Src/PixelShaderGen.cpp @@ -146,7 +146,7 @@ void GetPixelShaderId(PIXELSHADERUID *uid, u32 texturemask, u32 dstAlphaEnable) // output is given by .outreg // tevtemp is set according to swapmodetables and -static void WriteStage(char *&p, int n, u32 texture_mask, u32 HLSL); +static void WriteStage(char *&p, int n, u32 texture_mask, u32 HLSL, bool final); static void SampleTexture(char *&p, const char *destination, const char *texcoords, const char *texswap, int texmap, u32 texture_mask, u32 HLSL); // static void WriteAlphaCompare(char *&p, int num, int comp); static bool WriteAlphaTest(char *&p, u32 HLSL); @@ -520,7 +520,7 @@ const char *GeneratePixelShaderCode(u32 texture_mask, bool dstAlphaEnable, u32 H for (int i = 0; i < numStages; i++) - WriteStage(p, i, texture_mask,HLSL); //build the equation for this stage + WriteStage(p, i, texture_mask,HLSL,i+1 == numStages); //build the equation for this stage // emulation of unisgned 8 overflow when casting if(HLSL) { @@ -626,7 +626,7 @@ static const char *TEVCMPAlphaOPTable[16] = }; -static void WriteStage(char *&p, int n, u32 texture_mask, u32 HLSL) +static void WriteStage(char *&p, int n, u32 texture_mask, u32 HLSL, bool final) { char *rasswap = swapModeTable[bpmem.combiners[n].alphaC.rswap]; char *texswap = swapModeTable[bpmem.combiners[n].alphaC.tswap]; @@ -739,9 +739,9 @@ static void WriteStage(char *&p, int n, u32 texture_mask, u32 HLSL) WRITE(p, "konsttemp=float4(%s,%s);\n",tevKSelTableC[kc],tevKSelTableA[ka]); if (cc.clamp) - WRITE(p, "%s=saturate(", tevCOutputTable[cc.dest]); + WRITE(p, "%s=saturate(", tevCOutputTable[final?0:cc.dest]); else - WRITE(p, "%s=", tevCOutputTable[cc.dest]); + WRITE(p, "%s=", tevCOutputTable[final?0:cc.dest]); // combine the color channel if (cc.bias != 3) // if not compare @@ -788,9 +788,9 @@ static void WriteStage(char *&p, int n, u32 texture_mask, u32 HLSL) // combine the alpha channel if (ac.clamp) - WRITE(p, "%s=saturate(", tevAOutputTable[ac.dest]); + WRITE(p, "%s=saturate(", tevAOutputTable[final?0:ac.dest]); else - WRITE(p, "%s=", tevAOutputTable[ac.dest]); + WRITE(p, "%s=", tevAOutputTable[final?0:ac.dest]); if (ac.bias != 3) // if not compare { |