diff options
| author | JosJuice <josjuice@gmail.com> | 2020-06-18 11:44:02 +0200 |
|---|---|---|
| committer | JosJuice <josjuice@gmail.com> | 2020-06-18 11:57:00 +0200 |
| commit | 364ef76ba12cfae40397e29d3ff6b1cba8eb4826 (patch) | |
| tree | d947a057d1dfd20c58d32aad6312a149cc3dcff9 /Source/Core | |
| parent | 0bc7dcd172716f48639419bc4e6ddc415d0f368a (diff) | |
PatchEngine: Attempt to fix crash in IsStackSane
HostIsInstructionRAMAddress uses XCheckTLBFlag::OpcodeNoException,
so we should also use XCheckTLBFlag::OpcodeNoException when reading,
to ensure that we use the IBAT (as opposed to the DBAT) for both.
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PatchEngine.cpp | 3 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/MMU.cpp | 3 |
2 files changed, 3 insertions, 3 deletions
diff --git a/Source/Core/Core/PatchEngine.cpp b/Source/Core/Core/PatchEngine.cpp index c416996d25..b2cfa92327 100644 --- a/Source/Core/Core/PatchEngine.cpp +++ b/Source/Core/Core/PatchEngine.cpp @@ -231,7 +231,8 @@ static bool IsStackSane() // Check the link register makes sense (that it points to a valid IBAT address) const u32 address = PowerPC::HostRead_U32(next_SP + 4); - return PowerPC::HostIsInstructionRAMAddress(address) && 0 != PowerPC::HostRead_U32(address); + return PowerPC::HostIsInstructionRAMAddress(address) && + 0 != PowerPC::HostRead_Instruction(address); } bool ApplyFramePatches() diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp index 5a008f92fc..937cf02fd0 100644 --- a/Source/Core/Core/PowerPC/MMU.cpp +++ b/Source/Core/Core/PowerPC/MMU.cpp @@ -423,8 +423,7 @@ TryReadInstResult TryReadInstruction(u32 address) u32 HostRead_Instruction(const u32 address) { - UGeckoInstruction inst = HostRead_U32(address); - return inst.hex; + return ReadFromHardware<XCheckTLBFlag::OpcodeNoException, u32>(address); } static void Memcheck(u32 address, u32 var, bool write, size_t size) |
