diff options
| author | JosJuice <josjuice@gmail.com> | 2022-10-29 13:54:41 +0200 |
|---|---|---|
| committer | JosJuice <josjuice@gmail.com> | 2022-10-29 14:16:53 +0200 |
| commit | 431ee1c48a805433ea7b0cd8d611d29ead6fa2b7 (patch) | |
| tree | 756e13c803e43a336fa528fbc7d94885e0650625 /Source/Core | |
| parent | 0660f12da409e3bb8470b4b7e2a914bc94b940a1 (diff) | |
JitArm64: Improve register handling for MMIO loadstores
Because of the previous commit, `regs_in_use` must not include `dest_reg`
when calling MMIOLoadToReg. There are also some other registers we can
skip including in regs_in_use just for efficiency's sake.
The `addr_reg_set = false` statements that I've added in this commit are
technically redundant – if `mmio_address` is non-zero then `addr_reg_set`
is already false – but it's just a coincidence that that's the case.
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp index be39929f21..12c0bfe26c 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp @@ -141,8 +141,12 @@ void JitArm64::SafeLoadToReg(u32 dest, s32 addr, s32 offsetReg, u32 flags, s32 o } else if (mmio_address) { + regs_in_use[DecodeReg(ARM64Reg::W0)] = 0; + regs_in_use[DecodeReg(ARM64Reg::W30)] = 0; + regs_in_use[DecodeReg(dest_reg)] = 0; MMIOLoadToReg(Memory::mmio_mapping.get(), this, &m_float_emit, regs_in_use, fprs_in_use, dest_reg, mmio_address, flags); + addr_reg_set = false; } else { @@ -308,8 +312,13 @@ void JitArm64::SafeStoreFromReg(s32 dest, u32 value, s32 regOffset, u32 flags, s } else if (mmio_address) { + regs_in_use[DecodeReg(ARM64Reg::W0)] = 0; + regs_in_use[DecodeReg(ARM64Reg::W1)] = 0; + regs_in_use[DecodeReg(ARM64Reg::W30)] = 0; + regs_in_use[DecodeReg(RS)] = 0; MMIOWriteRegToAddr(Memory::mmio_mapping.get(), this, &m_float_emit, regs_in_use, fprs_in_use, RS, mmio_address, flags); + addr_reg_set = false; } else { |
