diff options
| author | nodchip <nodchip@gmail.com> | 2010-08-26 12:52:35 +0000 |
|---|---|---|
| committer | nodchip <nodchip@gmail.com> | 2010-08-26 12:52:35 +0000 |
| commit | 46e8ea80949a31a902a50b3fdc7d97a403540897 (patch) | |
| tree | b217299ccd0652727f931e100decc7afd32353b3 /Source/Core | |
| parent | 60696ffe30b2df9fae6d9f4fe1664d3bac201ae1 (diff) | |
JitIL: Partially reverted r6110 (andcx, norx, orcx, nandx, and eqvx) to fix the bug reported in Issue 3097.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6131 8ced0084-cf51-0410-be5f-012b33b47a6e
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp | 2 | ||||
| -rw-r--r-- | Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp | 10 |
2 files changed, 7 insertions, 5 deletions
diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp index a95ebd0289..6029c031ab 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Integer.cpp @@ -139,6 +139,8 @@ void JitIL::boolX(UGeckoInstruction inst) IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS); IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB); + // FIXME: Some instructions does not work well in NSMBW, MP2, etc. + // Refer JitIL_Tables.cpp. if (inst.SUBOP10 == 28) /* andx */ { a = ibuild.EmitAnd(s, b); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp index b4712094fc..76954eb118 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_Tables.cpp @@ -196,13 +196,13 @@ static GekkoOPTemplate table19[] = static GekkoOPTemplate table31[] = { {28, &JitIL::boolX}, //"andx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, - {60, &JitIL::boolX}, //"andcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, + {60, &JitIL::Default}, //"andcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, {444, &JitIL::boolX}, //"orx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, - {124, &JitIL::boolX}, //"norx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, + {124, &JitIL::Default}, //"norx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, {316, &JitIL::boolX}, //"xorx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, - {412, &JitIL::boolX}, //"orcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, - {476, &JitIL::boolX}, //"nandx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, - {284, &JitIL::boolX}, //"eqvx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, + {412, &JitIL::Default}, //"orcx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, + {476, &JitIL::Default}, //"nandx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, + {284, &JitIL::Default}, //"eqvx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_SB | FL_RC_BIT}}, {0, &JitIL::cmpXX}, //"cmp", OPTYPE_INTEGER, FL_IN_AB | FL_SET_CRn}}, {32, &JitIL::cmpXX}, //"cmpl", OPTYPE_INTEGER, FL_IN_AB | FL_SET_CRn}}, {26, &JitIL::cntlzwx}, //"cntlzwx",OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_RC_BIT}}, |