diff options
| author | JosJuice <josjuice@gmail.com> | 2022-09-20 23:02:22 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-09-20 23:02:22 +0200 |
| commit | 4ea694a7e403c673b457643e52435b355c96fd87 (patch) | |
| tree | e2759ab78f83adad63adb4f2ccb473c057a3b796 /Source/Core | |
| parent | d04e1ca96a705f606d5ba75f3bb915a0ea84571a (diff) | |
| parent | 6203c101f8ba31616df3cfe9f315f5a00697d318 (diff) | |
Merge pull request #11074 from JosJuice/jitarm64-spr-tl-alignment
JitArm64: Enforce correct alignment of SPR_TL
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp | 1 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/PowerPC.h | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp index 3d48711d04..6a8245b8bb 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp @@ -336,6 +336,7 @@ void JitArm64::mfspr(UGeckoInstruction inst) ADD(Xresult, XA, Xresult, ArithOption(Xresult, ShiftType::LSR, 3)); STR(IndexType::Unsigned, Xresult, PPC_REG, PPCSTATE_OFF_SPR(SPR_TL)); + static_assert((PPCSTATE_OFF_SPR(SPR_TL) & 0x7) == 0); if (CanMergeNextInstructions(1)) { diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h index ea05fdcd01..df60432fce 100644 --- a/Source/Core/Core/PowerPC/PowerPC.h +++ b/Source/Core/Core/PowerPC/PowerPC.h @@ -160,7 +160,8 @@ struct PowerPCState // special purpose registers - controls quantizers, DMA, and lots of other misc extensions. // also for power management, but we don't care about that. - u32 spr[1024]{}; + // JitArm64 needs 64-bit alignment for SPR_TL. + alignas(8) u32 spr[1024]{}; // Storage for the stack pointer of the BLR optimization. u8* stored_stack_pointer = nullptr; |