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authorMai <mai.iam2048@gmail.com>2024-01-15 15:14:59 -0500
committerGitHub <noreply@github.com>2024-01-15 15:14:59 -0500
commit6aacbc4c35f73ea441231608baaf7d5268bdec77 (patch)
tree29a46321173e4d04dd0380d6f785488359baef1a /Source/Core
parent5534f510e0e81e09f8bc078bf78b0198cfb8b0f4 (diff)
parentf2145c91e78ff2ae68e390deba504469ba06540b (diff)
Merge pull request #12488 from JosJuice/jitarm64-psq-stxx-w0
JitArm64: Remove unnecessary locking of W0 in psq_stXX
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp15
1 files changed, 8 insertions, 7 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
index 52bb74658c..5d1e561eef 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp
@@ -27,9 +27,9 @@ void JitArm64::psq_lXX(UGeckoInstruction inst)
!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));
// X30 is LR
- // X0 is the address
- // X1 contains the scale
- // X2 is a temporary
+ // X0 is a temporary
+ // X1 is the address
+ // X2 is the scale
// Q0 is the return register
// Q1 is a temporary
const s32 offset = inst.SIMM_12;
@@ -156,8 +156,9 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
!(m_ppc_state.feature_flags & FEATURE_FLAG_MSR_DR));
// X30 is LR
- // X0 contains the scale
- // X1 is the address
+ // X0 is a temporary
+ // X1 is the scale
+ // X2 is the address
// Q0 is the store register
const s32 offset = inst.SIMM_12;
@@ -204,7 +205,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
}
gpr.Lock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
- if (!js.assumeNoPairedQuantize || jo.memcheck || !jo.fastmem)
+ if (!js.assumeNoPairedQuantize || !jo.fastmem)
gpr.Lock(ARM64Reg::W0);
if (!js.assumeNoPairedQuantize && !jo.fastmem)
gpr.Lock(ARM64Reg::W3);
@@ -283,7 +284,7 @@ void JitArm64::psq_stXX(UGeckoInstruction inst)
gpr.Unlock(ARM64Reg::W1, ARM64Reg::W2, ARM64Reg::W30);
fpr.Unlock(ARM64Reg::Q0);
- if (!js.assumeNoPairedQuantize || jo.memcheck || !jo.fastmem)
+ if (!js.assumeNoPairedQuantize || !jo.fastmem)
gpr.Unlock(ARM64Reg::W0);
if (!js.assumeNoPairedQuantize && !jo.fastmem)
gpr.Unlock(ARM64Reg::W3);