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authorskidau <skidau@gmail.com>2014-09-30 13:19:45 +1000
committerskidau <skidau@gmail.com>2014-09-30 13:19:45 +1000
commit7828ddd542e89e6c8b5e5f861c55543c8950b080 (patch)
treedf383199b856b2e5a71482c614ef48c273f602b4 /Source/Core
parentda221e3d9c1b8edb09f37f2d5c0b41b2aade07cb (diff)
parentde86d2003a20c547f0d03a2f29e1971f29811f89 (diff)
Merge pull request #1150 from FioraAeterna/extsmerge
JIT: merge lbz + extsb
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
index e5ea85af01..9680a8439d 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
@@ -94,6 +94,15 @@ void Jit64::lXXx(UGeckoInstruction inst)
PanicAlert("Invalid instruction");
}
+ // PowerPC has no 8-bit sign extended load, but x86 does, so merge extsb with the load if we find it.
+ if (accessSize == 8 && js.next_inst.OPCD == 31 && js.next_inst.SUBOP10 == 954 &&
+ js.next_inst.RS == inst.RD && js.next_inst.RA == inst.RD && !js.next_inst.Rc)
+ {
+ js.downcountAmount++;
+ js.skipnext = true;
+ signExtend = true;
+ }
+
// TODO(ector): Make it dynamically enable/disable idle skipping where appropriate
// Will give nice boost to dual core mode
// (mb2): I agree,