diff options
| author | JosJuice <josjuice@gmail.com> | 2024-05-25 16:23:37 +0200 |
|---|---|---|
| committer | JosJuice <josjuice@gmail.com> | 2024-11-02 10:24:02 +0100 |
| commit | 7fddd39d97d529bb8e2f551ea01392e3650b58ef (patch) | |
| tree | f26fa9210c69814d54a69acf962945a4a32dbce8 /Source/Core | |
| parent | bbe271eec6735632a35aca7a87f38ad9800ab15c (diff) | |
JitArm64: Port some crXXX optimizations from Jit64
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp | 47 |
1 files changed, 36 insertions, 11 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp index 666103467c..7f9cf8fbd4 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp @@ -591,18 +591,43 @@ void JitArm64::crXXX(UGeckoInstruction inst) INSTRUCTION_START JITDISABLE(bJITSystemRegistersOff); - // Special case: crclr - if (inst.CRBA == inst.CRBB && inst.CRBA == inst.CRBD && inst.SUBOP10 == 193) + if (inst.CRBA == inst.CRBB) { - ClearCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3)); - return; - } - - // Special case: crset - if (inst.CRBA == inst.CRBB && inst.CRBA == inst.CRBD && inst.SUBOP10 == 289) - { - SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3)); - return; + switch (inst.SUBOP10) + { + // crclr + case 129: // crandc: A && ~B => 0 + case 193: // crxor: A ^ B => 0 + { + ClearCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3)); + return; + } + // crset + case 289: // creqv: ~(A ^ B) => 1 + case 417: // crorc: A || ~B => 1 + { + SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3)); + return; + } + case 257: // crand: A && B => A + case 449: // cror: A || B => A + { + auto WA = gpr.GetScopedReg(); + ARM64Reg XA = EncodeRegTo64(WA); + GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, false); + SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA); + return; + } + case 33: // crnor: ~(A || B) => ~A + case 225: // crnand: ~(A && B) => ~A + { + auto WA = gpr.GetScopedReg(); + ARM64Reg XA = EncodeRegTo64(WA); + GetCRFieldBit(inst.CRBA >> 2, 3 - (inst.CRBA & 3), XA, true); + SetCRFieldBit(inst.CRBD >> 2, 3 - (inst.CRBD & 3), XA); + return; + } + } } auto WA = gpr.GetScopedReg(); |
