x64Emitter: Adjust position of reference and pointer indicators

Matches the coding style.

2 files changed, 95 insertions, 95 deletions

diff --git a/Source/Core/Common/x64Emitter.cpp b/Source/Core/Common/x64Emitter.cpp
index 9e2f46f617..538604a1d8 100644
--- a/Source/Core/Common/x64Emitter.cpp
+++ b/Source/Core/Common/x64Emitter.cpp
@@ -76,17 +76,17 @@ enum NormalSSEOps
 };
 
 
-void XEmitter::SetCodePtr(u8 *ptr)
+void XEmitter::SetCodePtr(u8* ptr)
 {
 	code = ptr;
 }
 
-const u8 *XEmitter::GetCodePtr() const
+const u8* XEmitter::GetCodePtr() const
 {
 	return code;
 }
 
-u8 *XEmitter::GetWritableCodePtr()
+u8* XEmitter::GetWritableCodePtr()
 {
 	return code;
 }
@@ -97,7 +97,7 @@ void XEmitter::ReserveCodeSpace(int bytes)
 		*code++ = 0xCC;
 }
 
-const u8 *XEmitter::AlignCode4()
+const u8* XEmitter::AlignCode4()
 {
 	int c = int((u64)code & 3);
 	if (c)
@@ -105,7 +105,7 @@ const u8 *XEmitter::AlignCode4()
 	return code;
 }
 
-const u8 *XEmitter::AlignCode16()
+const u8* XEmitter::AlignCode16()
 {
 	int c = int((u64)code & 15);
 	if (c)
@@ -113,7 +113,7 @@ const u8 *XEmitter::AlignCode16()
 	return code;
 }
 
-const u8 *XEmitter::AlignCodePage()
+const u8* XEmitter::AlignCodePage()
 {
 	int c = int((u64)code & 4095);
 	if (c)
@@ -139,7 +139,7 @@ void XEmitter::WriteSIB(int scale, int index, int base)
 	Write8((u8)((scale << 6) | ((index & 7) << 3) | (base & 7)));
 }
 
-void OpArg::WriteREX(XEmitter *emit, int opBits, int bits, int customOp) const
+void OpArg::WriteREX(XEmitter* emit, int opBits, int bits, int customOp) const
 {
 	if (customOp == -1)       customOp = operandReg;
 	u8 op = 0x40;
@@ -189,7 +189,7 @@ void OpArg::WriteVEX(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp
 	}
 }
 
-void OpArg::WriteRest(XEmitter *emit, int extraBytes, X64Reg _operandReg,
+void OpArg::WriteRest(XEmitter* emit, int extraBytes, X64Reg _operandReg,
 	bool warn_64bit_offset) const
 {
 	if (_operandReg == INVALID_REG)
@@ -335,7 +335,7 @@ void XEmitter::Rex(int w, int r, int x, int b)
 		Write8(rx);
 }
 
-void XEmitter::JMP(const u8 *addr, bool force5Bytes)
+void XEmitter::JMP(const u8* addr, bool force5Bytes)
 {
 	u64 fn = (u64)addr;
 	if (!force5Bytes)
@@ -359,7 +359,7 @@ void XEmitter::JMP(const u8 *addr, bool force5Bytes)
 	}
 }
 
-void XEmitter::JMPptr(const OpArg &arg2)
+void XEmitter::JMPptr(const OpArg& arg2)
 {
 	OpArg arg = arg2;
 	if (arg.IsImm()) _assert_msg_(DYNA_REC, 0, "JMPptr - Imm argument");
@@ -386,7 +386,7 @@ void XEmitter::CALLptr(OpArg arg)
 	arg.WriteRest(this);
 }
 
-void XEmitter::CALL(const void *fnptr)
+void XEmitter::CALL(const void* fnptr)
 {
 	u64 distance = u64(fnptr) - (u64(code) + 5);
 	_assert_msg_(DYNA_REC,
@@ -457,7 +457,7 @@ void XEmitter::J_CC(CCFlags conditionCode, const u8* addr)
 	}
 }
 
-void XEmitter::SetJumpTarget(const FixupBranch &branch)
+void XEmitter::SetJumpTarget(const FixupBranch& branch)
 {
 	if (branch.type == 0)
 	{
@@ -628,7 +628,7 @@ void XEmitter::CBW(int bits)
 void XEmitter::PUSH(X64Reg reg) {WriteSimple1Byte(32, 0x50, reg);}
 void XEmitter::POP(X64Reg reg)  {WriteSimple1Byte(32, 0x58, reg);}
 
-void XEmitter::PUSH(int bits, const OpArg &reg)
+void XEmitter::PUSH(int bits, const OpArg& reg)
 {
 	if (reg.IsSimpleReg())
 		PUSH(reg.GetSimpleReg());
@@ -664,7 +664,7 @@ void XEmitter::PUSH(int bits, const OpArg &reg)
 	}
 }
 
-void XEmitter::POP(int /*bits*/, const OpArg &reg)
+void XEmitter::POP(int /*bits*/, const OpArg& reg)
 {
 	if (reg.IsSimpleReg())
 		POP(reg.GetSimpleReg());
@@ -925,7 +925,7 @@ void XEmitter::LEA(int bits, X64Reg dest, OpArg src)
 }
 
 //shift can be either imm8 or cl
-void XEmitter::WriteShift(int bits, OpArg dest, OpArg &shift, int ext)
+void XEmitter::WriteShift(int bits, OpArg dest, OpArg& shift, int ext)
 {
 	CheckFlags();
 	bool writeImm = false;
@@ -975,7 +975,7 @@ void XEmitter::SHR(int bits, OpArg dest, OpArg shift) {WriteShift(bits, dest, sh
 void XEmitter::SAR(int bits, OpArg dest, OpArg shift) {WriteShift(bits, dest, shift, 7);}
 
 // index can be either imm8 or register, don't use memory destination because it's slow
-void XEmitter::WriteBitTest(int bits, OpArg &dest, OpArg &index, int ext)
+void XEmitter::WriteBitTest(int bits, OpArg& dest, OpArg& index, int ext)
 {
 	CheckFlags();
 	if (dest.IsImm())
@@ -1074,7 +1074,7 @@ void XEmitter::SHLD(int bits, OpArg dest, OpArg src, OpArg shift)
 	}
 }
 
-void OpArg::WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg _operandReg, int bits)
+void OpArg::WriteSingleByteOp(XEmitter* emit, u8 op, X64Reg _operandReg, int bits)
 {
 	if (bits == 16)
 		emit->Write8(0x66);
@@ -1086,7 +1086,7 @@ void OpArg::WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg _operandReg, int bit
 }
 
 //operand can either be immediate or register
-void OpArg::WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const
+void OpArg::WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& operand, int bits) const
 {
 	X64Reg _operandReg;
 	if (IsImm())
@@ -1232,7 +1232,7 @@ void OpArg::WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &o
 	}
 }
 
-void XEmitter::WriteNormalOp(int bits, NormalOp op, const OpArg &a1, const OpArg &a2)
+void XEmitter::WriteNormalOp(int bits, NormalOp op, const OpArg& a1, const OpArg& a2)
 {
 	if (a1.IsImm())
 	{
@@ -1258,23 +1258,23 @@ void XEmitter::WriteNormalOp(int bits, NormalOp op, const OpArg &a1, const OpArg
 	}
 }
 
-void XEmitter::ADD (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmADD, a1, a2);}
-void XEmitter::ADC (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmADC, a1, a2);}
-void XEmitter::SUB (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmSUB, a1, a2);}
-void XEmitter::SBB (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmSBB, a1, a2);}
-void XEmitter::AND (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmAND, a1, a2);}
-void XEmitter::OR  (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmOR , a1, a2);}
-void XEmitter::XOR (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmXOR, a1, a2);}
-void XEmitter::MOV (int bits, const OpArg &a1, const OpArg &a2)
+void XEmitter::ADD (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmADD, a1, a2);}
+void XEmitter::ADC (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmADC, a1, a2);}
+void XEmitter::SUB (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmSUB, a1, a2);}
+void XEmitter::SBB (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmSBB, a1, a2);}
+void XEmitter::AND (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmAND, a1, a2);}
+void XEmitter::OR  (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmOR , a1, a2);}
+void XEmitter::XOR (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmXOR, a1, a2);}
+void XEmitter::MOV (int bits, const OpArg& a1, const OpArg& a2)
 {
 	if (a1.IsSimpleReg() && a2.IsSimpleReg() && a1.GetSimpleReg() == a2.GetSimpleReg())
 		ERROR_LOG(DYNA_REC, "Redundant MOV @ %p - bug in JIT?", code);
 	WriteNormalOp(bits, nrmMOV, a1, a2);
 }
-void XEmitter::TEST(int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmTEST, a1, a2);}
-void XEmitter::CMP (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmCMP, a1, a2);}
-void XEmitter::XCHG(int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(bits, nrmXCHG, a1, a2);}
-void XEmitter::CMP_or_TEST(int bits, const OpArg &a1, const OpArg &a2)
+void XEmitter::TEST(int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmTEST, a1, a2);}
+void XEmitter::CMP (int bits, const OpArg& a1, const OpArg& a2) {CheckFlags(); WriteNormalOp(bits, nrmCMP, a1, a2);}
+void XEmitter::XCHG(int bits, const OpArg& a1, const OpArg& a2) {WriteNormalOp(bits, nrmXCHG, a1, a2);}
+void XEmitter::CMP_or_TEST(int bits, const OpArg& a1, const OpArg& a2)
 {
 	CheckFlags();
 	if (a1.IsSimpleReg() && a2.IsImm() && a2.offset == 0) // turn 'CMP reg, 0' into shorter 'TEST reg, reg'
@@ -1460,8 +1460,8 @@ void XEmitter::WriteBMI2Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg
 	WriteBMIOp(size, opPrefix, op, regOp1, regOp2, arg, extrabytes);
 }
 
-void XEmitter::MOVD_xmm(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x6E, dest, arg, 0);}
-void XEmitter::MOVD_xmm(const OpArg &arg, X64Reg src) {WriteSSEOp(0x66, 0x7E, src, arg, 0);}
+void XEmitter::MOVD_xmm(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x6E, dest, arg, 0);}
+void XEmitter::MOVD_xmm(const OpArg& arg, X64Reg src) {WriteSSEOp(0x66, 0x7E, src, arg, 0);}
 
 void XEmitter::MOVQ_xmm(X64Reg dest, OpArg arg)
 {
@@ -1658,10 +1658,10 @@ void XEmitter::PACKSSDW(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x6B, dest, ar
 void XEmitter::PACKSSWB(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x63, dest, arg);}
 void XEmitter::PACKUSWB(X64Reg dest, OpArg arg) {WriteSSEOp(0x66, 0x67, dest, arg);}
 
-void XEmitter::PUNPCKLBW(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x60, dest, arg);}
-void XEmitter::PUNPCKLWD(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x61, dest, arg);}
-void XEmitter::PUNPCKLDQ(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x62, dest, arg);}
-void XEmitter::PUNPCKLQDQ(X64Reg dest, const OpArg &arg) {WriteSSEOp(0x66, 0x6C, dest, arg);}
+void XEmitter::PUNPCKLBW(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x60, dest, arg);}
+void XEmitter::PUNPCKLWD(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x61, dest, arg);}
+void XEmitter::PUNPCKLDQ(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x62, dest, arg);}
+void XEmitter::PUNPCKLQDQ(X64Reg dest, const OpArg& arg) {WriteSSEOp(0x66, 0x6C, dest, arg);}
 
 void XEmitter::PSRLW(X64Reg reg, int shift)
 {
diff --git a/Source/Core/Common/x64Emitter.h b/Source/Core/Common/x64Emitter.h
index 9f0fe453ab..88c73d364d 100644
--- a/Source/Core/Common/x64Emitter.h
+++ b/Source/Core/Common/x64Emitter.h
@@ -145,11 +145,11 @@ struct OpArg
 		return operandReg == b.operandReg && scale == b.scale && offsetOrBaseReg == b.offsetOrBaseReg &&
 		       indexReg == b.indexReg && offset == b.offset;
 	}
-	void WriteREX(XEmitter *emit, int opBits, int bits, int customOp = -1) const;
+	void WriteREX(XEmitter* emit, int opBits, int bits, int customOp = -1) const;
 	void WriteVEX(XEmitter* emit, X64Reg regOp1, X64Reg regOp2, int L, int pp, int mmmmm, int W = 0) const;
-	void WriteRest(XEmitter *emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
-	void WriteFloatModRM(XEmitter *emit, FloatOp op);
-	void WriteSingleByteOp(XEmitter *emit, u8 op, X64Reg operandReg, int bits);
+	void WriteRest(XEmitter* emit, int extraBytes=0, X64Reg operandReg=INVALID_REG, bool warn_64bit_offset = true) const;
+	void WriteFloatModRM(XEmitter* emit, FloatOp op);
+	void WriteSingleByteOp(XEmitter* emit, u8 op, X64Reg operandReg, int bits);
 
 	u64 Imm64() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM64); return (u64)offset; }
 	u32 Imm32() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM32); return (u32)offset; }
@@ -161,7 +161,7 @@ struct OpArg
 	s16 SImm16() const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM16); return (s16)offset; }
 	s8  SImm8()  const { _dbg_assert_(DYNA_REC, scale == SCALE_IMM8);  return (s8)offset; }
 
-	void WriteNormalOp(XEmitter *emit, bool toRM, NormalOp op, const OpArg &operand, int bits) const;
+	void WriteNormalOp(XEmitter* emit, bool toRM, NormalOp op, const OpArg& operand, int bits) const;
 	bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;}
 	bool IsSimpleReg() const {return scale == SCALE_NONE;}
 	bool IsSimpleReg(X64Reg reg) const
@@ -171,7 +171,7 @@ struct OpArg
 		return GetSimpleReg() == reg;
 	}
 
-	bool CanDoOpWith(const OpArg &other) const
+	bool CanDoOpWith(const OpArg& other) const
 	{
 		if (IsSimpleReg()) return true;
 		if (!IsSimpleReg() && !other.IsSimpleReg() && !other.IsImm()) return false;
@@ -214,7 +214,7 @@ private:
 };
 
 template <typename T>
-inline OpArg M(const T *ptr)    {return OpArg((u64)(const void *)ptr, (int)SCALE_RIP);}
+inline OpArg M(const T* ptr)    {return OpArg((u64)(const void*)ptr, (int)SCALE_RIP);}
 inline OpArg R(X64Reg value)    {return OpArg(0, SCALE_NONE, value);}
 inline OpArg MatR(X64Reg value) {return OpArg(0, SCALE_ATREG, value);}
 
@@ -275,7 +275,7 @@ inline u32 PtrOffset(const void* ptr, const void* base)
 
 struct FixupBranch
 {
-	u8 *ptr;
+	u8* ptr;
 	int type; //0 = 8bit 1 = 32bit
 };
 
@@ -297,7 +297,7 @@ class XEmitter
 {
 	friend struct OpArg;  // for Write8 etc
 private:
-	u8 *code;
+	u8* code;
 	bool flags_locked;
 
 	void CheckFlags();
@@ -307,8 +307,8 @@ private:
 	void WriteSimple2Byte(int bits, u8 byte1, u8 byte2, X64Reg reg);
 	void WriteMulDivType(int bits, OpArg src, int ext);
 	void WriteBitSearchType(int bits, X64Reg dest, OpArg src, u8 byte2, bool rep = false);
-	void WriteShift(int bits, OpArg dest, OpArg &shift, int ext);
-	void WriteBitTest(int bits, OpArg &dest, OpArg &index, int ext);
+	void WriteShift(int bits, OpArg dest, OpArg& shift, int ext);
+	void WriteBitTest(int bits, OpArg& dest, OpArg& index, int ext);
 	void WriteMXCSR(OpArg arg, int ext);
 	void WriteSSEOp(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
 	void WriteSSSE3Op(u8 opPrefix, u16 op, X64Reg regOp, OpArg arg, int extrabytes = 0);
@@ -323,7 +323,7 @@ private:
 	void WriteBMI2Op(int size, u8 opPrefix, u16 op, X64Reg regOp1, X64Reg regOp2, OpArg arg, int extrabytes = 0);
 	void WriteMOVBE(int bits, u8 op, X64Reg regOp, OpArg arg);
 	void WriteFloatLoadStore(int bits, FloatOp op, FloatOp op_80b, OpArg arg);
-	void WriteNormalOp(int bits, NormalOp op, const OpArg &a1, const OpArg &a2);
+	void WriteNormalOp(int bits, NormalOp op, const OpArg& a1, const OpArg& a2);
 
 	void ABI_CalculateFrameSize(BitSet32 mask, size_t rsp_alignment, size_t needed_frame_size, size_t* shadowp, size_t* subtractionp, size_t* xmm_offsetp);
 
@@ -335,19 +335,19 @@ protected:
 
 public:
 	XEmitter() { code = nullptr; flags_locked = false; }
-	XEmitter(u8 *code_ptr) { code = code_ptr; flags_locked = false; }
+	XEmitter(u8* code_ptr) { code = code_ptr; flags_locked = false; }
 	virtual ~XEmitter() {}
 
 	void WriteModRM(int mod, int rm, int reg);
 	void WriteSIB(int scale, int index, int base);
 
-	void SetCodePtr(u8 *ptr);
+	void SetCodePtr(u8* ptr);
 	void ReserveCodeSpace(int bytes);
-	const u8 *AlignCode4();
-	const u8 *AlignCode16();
-	const u8 *AlignCodePage();
-	const u8 *GetCodePtr() const;
-	u8 *GetWritableCodePtr();
+	const u8* AlignCode4();
+	const u8* AlignCode16();
+	const u8* AlignCodePage();
+	const u8* GetCodePtr() const;
+	u8* GetWritableCodePtr();
 
 	void LockFlags() { flags_locked = true; }
 	void UnlockFlags() { flags_locked = false; }
@@ -380,8 +380,8 @@ public:
 	// Stack control
 	void PUSH(X64Reg reg);
 	void POP(X64Reg reg);
-	void PUSH(int bits, const OpArg &reg);
-	void POP(int bits, const OpArg &reg);
+	void PUSH(int bits, const OpArg& reg);
+	void POP(int bits, const OpArg& reg);
 	void PUSHF();
 	void POPF();
 
@@ -391,20 +391,20 @@ public:
 	void UD2();
 	FixupBranch J(bool force5bytes = false);
 
-	void JMP(const u8 * addr, bool force5Bytes = false);
-	void JMPptr(const OpArg &arg);
+	void JMP(const u8* addr, bool force5Bytes = false);
+	void JMPptr(const OpArg& arg);
 	void JMPself(); //infinite loop!
 #ifdef CALL
 #undef CALL
 #endif
-	void CALL(const void *fnptr);
+	void CALL(const void* fnptr);
 	void CALLptr(OpArg arg);
 
 	FixupBranch J_CC(CCFlags conditionCode, bool force5bytes = false);
 	//void J_CC(CCFlags conditionCode, JumpTarget target);
 	void J_CC(CCFlags conditionCode, const u8* addr);
 
-	void SetJumpTarget(const FixupBranch &branch);
+	void SetJumpTarget(const FixupBranch& branch);
 
 	void SETcc(CCFlags flag, OpArg dest);
 	// Note: CMOV brings small if any benefit on current CPUs.
@@ -473,24 +473,24 @@ public:
 
 	// Integer arithmetic
 	void NEG (int bits, OpArg src);
-	void ADD (int bits, const OpArg &a1, const OpArg &a2);
-	void ADC (int bits, const OpArg &a1, const OpArg &a2);
-	void SUB (int bits, const OpArg &a1, const OpArg &a2);
-	void SBB (int bits, const OpArg &a1, const OpArg &a2);
-	void AND (int bits, const OpArg &a1, const OpArg &a2);
-	void CMP (int bits, const OpArg &a1, const OpArg &a2);
+	void ADD (int bits, const OpArg& a1, const OpArg& a2);
+	void ADC (int bits, const OpArg& a1, const OpArg& a2);
+	void SUB (int bits, const OpArg& a1, const OpArg& a2);
+	void SBB (int bits, const OpArg& a1, const OpArg& a2);
+	void AND (int bits, const OpArg& a1, const OpArg& a2);
+	void CMP (int bits, const OpArg& a1, const OpArg& a2);
 
 	// Bit operations
 	void NOT (int bits, OpArg src);
-	void OR  (int bits, const OpArg &a1, const OpArg &a2);
-	void XOR (int bits, const OpArg &a1, const OpArg &a2);
-	void MOV (int bits, const OpArg &a1, const OpArg &a2);
-	void TEST(int bits, const OpArg &a1, const OpArg &a2);
+	void OR  (int bits, const OpArg& a1, const OpArg& a2);
+	void XOR (int bits, const OpArg& a1, const OpArg& a2);
+	void MOV (int bits, const OpArg& a1, const OpArg& a2);
+	void TEST(int bits, const OpArg& a1, const OpArg& a2);
 
-	void CMP_or_TEST(int bits, const OpArg &a1, const OpArg &a2);
+	void CMP_or_TEST(int bits, const OpArg& a1, const OpArg& a2);
 
 	// Are these useful at all? Consider removing.
-	void XCHG(int bits, const OpArg &a1, const OpArg &a2);
+	void XCHG(int bits, const OpArg& a1, const OpArg& a2);
 	void XCHG_AHAL();
 
 	// Byte swapping (32 and 64-bit only).
@@ -661,9 +661,9 @@ public:
 	// one is the xmm reg.
 	// ie: "MOVD_xmm(eax, R(xmm1))" generates incorrect code (movd xmm0, rcx)
 	//     use "MOVD_xmm(R(eax), xmm1)" instead.
-	void MOVD_xmm(X64Reg dest, const OpArg &arg);
+	void MOVD_xmm(X64Reg dest, const OpArg& arg);
 	void MOVQ_xmm(X64Reg dest, OpArg arg);
-	void MOVD_xmm(const OpArg &arg, X64Reg src);
+	void MOVD_xmm(const OpArg& arg, X64Reg src);
 	void MOVQ_xmm(OpArg arg, X64Reg src);
 
 	// SSE/SSE2: Generates a mask from the high bits of the components of the packed register in question.
@@ -701,10 +701,10 @@ public:
 	void PACKUSDW(X64Reg dest, OpArg arg);
 	void PACKUSWB(X64Reg dest, OpArg arg);
 
-	void PUNPCKLBW(X64Reg dest, const OpArg &arg);
-	void PUNPCKLWD(X64Reg dest, const OpArg &arg);
-	void PUNPCKLDQ(X64Reg dest, const OpArg &arg);
-	void PUNPCKLQDQ(X64Reg dest, const OpArg &arg);
+	void PUNPCKLBW(X64Reg dest, const OpArg& arg);
+	void PUNPCKLWD(X64Reg dest, const OpArg& arg);
+	void PUNPCKLDQ(X64Reg dest, const OpArg& arg);
+	void PUNPCKLQDQ(X64Reg dest, const OpArg& arg);
 
 	void PTEST(X64Reg dest, OpArg arg);
 	void PAND(X64Reg dest, OpArg arg);
@@ -908,27 +908,27 @@ public:
 	// Utility functions
 	// The difference between this and CALL is that this aligns the stack
 	// where appropriate.
-	void ABI_CallFunction(const void *func);
+	void ABI_CallFunction(const void* func);
 
-	void ABI_CallFunctionC16(const void *func, u16 param1);
-	void ABI_CallFunctionCC16(const void *func, u32 param1, u16 param2);
+	void ABI_CallFunctionC16(const void* func, u16 param1);
+	void ABI_CallFunctionCC16(const void* func, u32 param1, u16 param2);
 
 	// These only support u32 parameters, but that's enough for a lot of uses.
 	// These will destroy the 1 or 2 first "parameter regs".
-	void ABI_CallFunctionC(const void *func, u32 param1);
-	void ABI_CallFunctionCC(const void *func, u32 param1, u32 param2);
-	void ABI_CallFunctionCP(const void *func, u32 param1, void *param2);
-	void ABI_CallFunctionCCC(const void *func, u32 param1, u32 param2, u32 param3);
-	void ABI_CallFunctionCCP(const void *func, u32 param1, u32 param2, void *param3);
-	void ABI_CallFunctionCCCP(const void *func, u32 param1, u32 param2,u32 param3, void *param4);
-	void ABI_CallFunctionPC(const void *func, void *param1, u32 param2);
-	void ABI_CallFunctionPPC(const void *func, void *param1, void *param2, u32 param3);
-	void ABI_CallFunctionAC(int bits, const void *func, const OpArg &arg1, u32 param2);
-	void ABI_CallFunctionA(int bits, const void *func, const OpArg &arg1);
+	void ABI_CallFunctionC(const void* func, u32 param1);
+	void ABI_CallFunctionCC(const void* func, u32 param1, u32 param2);
+	void ABI_CallFunctionCP(const void* func, u32 param1, void* param2);
+	void ABI_CallFunctionCCC(const void* func, u32 param1, u32 param2, u32 param3);
+	void ABI_CallFunctionCCP(const void* func, u32 param1, u32 param2, void* param3);
+	void ABI_CallFunctionCCCP(const void* func, u32 param1, u32 param2,u32 param3, void* param4);
+	void ABI_CallFunctionPC(const void* func, void* param1, u32 param2);
+	void ABI_CallFunctionPPC(const void* func, void* param1, void* param2, u32 param3);
+	void ABI_CallFunctionAC(int bits, const void* func, const OpArg& arg1, u32 param2);
+	void ABI_CallFunctionA(int bits, const void* func, const OpArg& arg1);
 
 	// Pass a register as a parameter.
-	void ABI_CallFunctionR(const void *func, X64Reg reg1);
-	void ABI_CallFunctionRR(const void *func, X64Reg reg1, X64Reg reg2);
+	void ABI_CallFunctionR(const void* func, X64Reg reg1);
+	void ABI_CallFunctionRR(const void* func, X64Reg reg1, X64Reg reg2);
 
 	// Helper method for the above, or can be used separately.
 	void MOVTwo(int bits, Gen::X64Reg dst1, Gen::X64Reg src1, s32 offset, Gen::X64Reg dst2, Gen::X64Reg src2);