summaryrefslogtreecommitdiff
path: root/Source/Core
diff options
context:
space:
mode:
authorStenzek <stenzek@gmail.com>2018-01-27 18:21:11 +1000
committerStenzek <stenzek@gmail.com>2018-01-27 22:29:39 +1000
commit8933fe599c5ae7127c6cd3de707eb73f3d79d117 (patch)
tree144144370bc6c7b394d5560f2a481e6d4bccddd6 /Source/Core
parent7f3c31d78de929244baadfb8719f1bf37b85296e (diff)
Jit64: Update PC before slowmem reads as well as writes
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
index cdc91294a9..9c88cc8726 100644
--- a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
+++ b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
@@ -376,6 +376,10 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg& opAddress,
exit = J(true);
SetJumpTarget(slow);
}
+
+ // Helps external systems know which instruction triggered the read.
+ MOV(32, PPCSTATE(pc), Imm32(g_jit->js.compilerPC));
+
size_t rsp_alignment = (flags & SAFE_LOADSTORE_NO_PROLOG) ? 8 : 0;
ABI_PushRegistersAndAdjustStack(registersInUse, rsp_alignment);
switch (accessSize)
@@ -436,6 +440,9 @@ void EmuCodeBlock::SafeLoadToRegImmediate(X64Reg reg_value, u32 address, int acc
return;
}
+ // Helps external systems know which instruction triggered the read.
+ MOV(32, PPCSTATE(pc), Imm32(g_jit->js.compilerPC));
+
// Fall back to general-case code.
ABI_PushRegistersAndAdjustStack(registersInUse, 0);
switch (accessSize)