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authorLioncash <mathew1800@gmail.com>2018-05-23 19:45:24 -0400
committerLioncash <mathew1800@gmail.com>2018-05-23 21:13:02 -0400
commit8a79f9099cebad4e4517ed7d89418ac23faef32f (patch)
treeac977e35cefafd9e24b32bf9e27388fa33547b3e /Source/Core
parent5ac05725c88a146ff517dc145c07a9f475186256 (diff)
Interpreter_FloatingPoint: Set FPSCR.VXSNAN if input to fres is a signaling NaN
fres is defined as having the VXSNAN bit set if an input to the instruction is a signaling NaN
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp7
1 files changed, 6 insertions, 1 deletions
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp
index 98a5b8a2c0..18a33a1a5e 100644
--- a/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp
+++ b/Source/Core/Core/PowerPC/Interpreter/Interpreter_FloatingPoint.cpp
@@ -394,7 +394,7 @@ void Interpreter::fdivsx(UGeckoInstruction inst)
// Single precision only.
void Interpreter::fresx(UGeckoInstruction inst)
{
- double b = rPS0(inst.FB);
+ const double b = rPS0(inst.FB);
rPS0(inst.FD) = rPS1(inst.FD) = Common::ApproximateReciprocal(b);
if (b == 0.0)
@@ -402,6 +402,11 @@ void Interpreter::fresx(UGeckoInstruction inst)
SetFPException(FPSCR_ZX);
}
+ if (Common::IsSNAN(b))
+ {
+ SetFPException(FPSCR_VXSNAN);
+ }
+
PowerPC::UpdateFPRF(rPS0(inst.FD));
if (inst.Rc)