diff options
| author | JosJuice <josjuice@gmail.com> | 2023-12-27 16:39:00 +0100 |
|---|---|---|
| committer | JosJuice <josjuice@gmail.com> | 2023-12-27 16:39:00 +0100 |
| commit | 8fcf9969ebd53d6e5e13fa70e5d034ccb13af6ad (patch) | |
| tree | 19666e8cca8d4d44cfc8b173d2cda895c506334c /Source/Core | |
| parent | b1438c224fe30006b51f064a9460c93fa25480bf (diff) | |
Jit: Reload RMEM/MEM_REG on ISI exception
Aims to fix https://bugs.dolphin-emu.org/issues/13444.
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/Jit64/JitAsm.cpp | 3 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp | 5 |
2 files changed, 8 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp b/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp index 525d65cf70..7b0e3e8242 100644 --- a/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp +++ b/Source/Core/Core/PowerPC/Jit64/JitAsm.cpp @@ -221,6 +221,9 @@ void Jit64AsmRoutineManager::Generate() ABI_CallFunction(JitTrampoline); ABI_PopRegistersAndAdjustStack({}, 0); + // If jitting triggered an ISI exception, MSR.DR may have changed + MOV(64, R(RMEM), PPCSTATE(mem_ptr)); + JMP(dispatcher_no_check, Jump::Near); SetJumpTarget(bail); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp b/Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp index 87f8f3ae2e..cd93fccebf 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp @@ -177,7 +177,12 @@ void JitArm64::GenerateAsm() // Call JIT ResetStack(); ABI_CallFunction(&JitTrampoline, this, DISPATCHER_PC); + LDR(IndexType::Unsigned, DISPATCHER_PC, PPC_REG, PPCSTATE_OFF(pc)); + + // If jitting triggered an ISI exception, MSR.DR may have changed + EmitUpdateMembase(); + B(dispatcher_no_check); SetJumpTarget(bail); |
