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| author | Scott Mansell <phiren@gmail.com> | 2015-07-22 05:16:51 +1200 |
|---|---|---|
| committer | Scott Mansell <phiren@gmail.com> | 2015-07-22 05:16:51 +1200 |
| commit | 9ae8e38a8aefbe357c5a425b3a09ff4f22eaf432 (patch) | |
| tree | d8c5930da348ba17f8c5ba349014de5416b9a04a /Source/Core | |
| parent | 53bc147b452ee74a1a9c92ebc7a2be71a2053d5b (diff) | |
| parent | a31ebb9bcd8365e19a1003032b8ed1ed30c7ed55 (diff) | |
Merge pull request #2717 from phire/fix-reordering
PPCAnalyst: Don't swap instruction which might cause interrupts.
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/PPCAnalyst.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Source/Core/Core/PowerPC/PPCAnalyst.cpp b/Source/Core/Core/PowerPC/PPCAnalyst.cpp index cdd7fcc19b..f08b0f4216 100644 --- a/Source/Core/Core/PowerPC/PPCAnalyst.cpp +++ b/Source/Core/Core/PowerPC/PPCAnalyst.cpp @@ -250,6 +250,10 @@ static bool CanSwapAdjacentOps(const CodeOp &a, const CodeOp &b) if (b_info->type != OPTYPE_INTEGER) return false; + // And it's possible a might raise an interrupt too (fcmpo/fcmpu) + if (a_info->type != OPTYPE_INTEGER) + return false; + // Check that we have no register collisions. // That is, check that none of b's outputs matches any of a's inputs, // and that none of a's outputs matches any of b's inputs. |