diff options
| author | Mai M <mathew1800@gmail.com> | 2021-07-31 03:56:51 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-07-31 03:56:51 -0400 |
| commit | bef1fdb4cba1fa648488191d766d7fced76951c2 (patch) | |
| tree | 418f311451188fc78d6c7248b54c0adeb34e9c30 /Source/Core | |
| parent | b6bd3fc4303277114998cea36bbb3a7b22d0f4e6 (diff) | |
| parent | 0e62dac4bbd5fe935fc7b4f31e184c0081cf0cbd (diff) | |
Merge pull request #9974 from JosJuice/jitarm64-mtfsfix
JitArm64: Implement mtfsfix
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/Jit.h | 1 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp | 36 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp | 2 |
3 files changed, 38 insertions, 1 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h index 9d463a72b3..50ccbcea3a 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.h +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h @@ -121,6 +121,7 @@ public: void mffsx(UGeckoInstruction inst); void mtfsb0x(UGeckoInstruction inst); void mtfsb1x(UGeckoInstruction inst); + void mtfsfix(UGeckoInstruction inst); // LoadStore void lXX(UGeckoInstruction inst); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp index 4a40ee7450..e0cd9d36a9 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp @@ -816,3 +816,39 @@ void JitArm64::mtfsb1x(UGeckoInstruction inst) if (inst.CRBD >= 29) UpdateRoundingMode(); } + +void JitArm64::mtfsfix(UGeckoInstruction inst) +{ + INSTRUCTION_START + JITDISABLE(bJITSystemRegistersOff); + FALLBACK_IF(inst.Rc); + + u8 imm = (inst.hex >> (31 - 19)) & 0xF; + u8 shift = 28 - 4 * inst.CRFD; + + ARM64Reg WA = gpr.GetReg(); + LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(fpscr)); + + if (imm == 0xF) + { + ORR(WA, WA, LogicalImm(0xF << shift, 32)); + } + else if (imm == 0x0) + { + BFI(WA, ARM64Reg::WZR, shift, 4); + } + else + { + ARM64Reg WB = gpr.GetReg(); + MOVZ(WB, imm); + BFI(WA, WB, shift, 4); + gpr.Unlock(WB); + } + + STR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(fpscr)); + gpr.Unlock(WA); + + // Field 7 contains NI and RN. + if (inst.CRFD == 7) + UpdateRoundingMode(); +} diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp index 4d44cce2dc..aa6255c0ff 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp @@ -318,7 +318,7 @@ constexpr std::array<GekkoOPTemplate, 15> table63{{ {583, &JitArm64::mffsx}, // mffsx {70, &JitArm64::mtfsb0x}, // mtfsb0x {38, &JitArm64::mtfsb1x}, // mtfsb1x - {134, &JitArm64::FallBackToInterpreter}, // mtfsfix + {134, &JitArm64::mtfsfix}, // mtfsfix {711, &JitArm64::FallBackToInterpreter}, // mtfsfx }}; |