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authorRyan Houdek <Sonicadvance1@gmail.com>2015-07-27 17:18:02 -0500
committerRyan Houdek <Sonicadvance1@gmail.com>2015-07-27 17:18:02 -0500
commitc1fcb23b034b9549146551a4e013c6742b5609af (patch)
tree310ca579ac5fdfd2d95e66b06ab9e6773b04163b /Source/Core
parent6cd8ee9e4e6950c9eddb2c1aef186948fb95ed19 (diff)
parentec0582ee5bf290311a45c4b334bfbe218bbe7141 (diff)
Merge pull request #2783 from degasus/arm
JitArm64: fix lfd
Diffstat (limited to 'Source/Core')
-rw-r--r--Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
index 06a7b8ec91..da79ce823b 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
@@ -71,7 +71,9 @@ void JitArm64::lfXX(UGeckoInstruction inst)
u32 imm_addr = 0;
bool is_immediate = false;
- fpr.BindToRegister(inst.FD, false);
+ // 64 bit loads only load PSR0
+ fpr.BindToRegister(inst.FD, flags & BackPatchInfo::FLAG_SIZE_F64);
+
ARM64Reg VD = fpr.R(inst.FD);
ARM64Reg addr_reg = W0;