diff options
| author | skidau <skidau@gmail.com> | 2012-05-01 20:52:35 +1000 |
|---|---|---|
| committer | skidau <skidau@gmail.com> | 2012-05-01 20:52:35 +1000 |
| commit | d015f0926ab306167c90d2d532d4ac38da693be5 (patch) | |
| tree | 2a6a6f3693b0d0d73fc94f4195a5455af0a0a36a /Source/Core | |
| parent | d557c913e83540db154ab786eb6585b22608ff2d (diff) | |
Fixed a typo and some far jumps in the JIT.
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp | 12 | ||||
| -rw-r--r-- | Source/Core/Core/Src/PowerPC/PowerPC.cpp | 11 |
2 files changed, 10 insertions, 13 deletions
diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp index 6cc4fd83b4..6e262a209d 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp @@ -592,7 +592,7 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc //This instruction uses FPU - needs to add FP exception bailout TEST(32, M(&PowerPC::ppcState.msr), Imm32(1 << 13)); // Test FP enabled bit - FixupBranch b1 = J_CC(CC_NZ); + FixupBranch b1 = J_CC(CC_NZ, true); // If a FPU exception occurs, the exception handler will read // from PC. Update PC with the latest value in case that happens. @@ -612,13 +612,13 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc fpr.Flush(FLUSH_ALL); TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_ISI | EXCEPTION_PROGRAM | EXCEPTION_SYSCALL | EXCEPTION_FPU_UNAVAILABLE | EXCEPTION_DSI | EXCEPTION_ALIGNMENT)); - FixupBranch clearInt = J_CC(CC_NZ); + FixupBranch clearInt = J_CC(CC_NZ, true); TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_EXTERNAL_INT)); - FixupBranch noExtException = J_CC(CC_Z); + FixupBranch noExtException = J_CC(CC_Z, true); TEST(32, M((void *)&PowerPC::ppcState.msr), Imm32(0x0008000)); - FixupBranch noExtIntEnable = J_CC(CC_Z); + FixupBranch noExtIntEnable = J_CC(CC_Z, true); TEST(32, M((void *)&ProcessorInterface::m_InterruptCause), Imm32(ProcessorInterface::INT_CAUSE_CP | ProcessorInterface::INT_CAUSE_PE_TOKEN | ProcessorInterface::INT_CAUSE_PE_FINISH)); - FixupBranch noCPInt = J_CC(CC_Z); + FixupBranch noCPInt = J_CC(CC_Z, true); MOV(32, M(&PC), Imm32(ops[i].address)); WriteExternalExceptionExit(); @@ -652,7 +652,7 @@ const u8* Jit64::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBloc fpr.Flush(FLUSH_ALL); TEST(32, M((void *)&PowerPC::ppcState.Exceptions), Imm32(EXCEPTION_DSI)); - FixupBranch noMemException = J_CC(CC_Z); + FixupBranch noMemException = J_CC(CC_Z, true); // If a memory exception occurs, the exception handler will read // from PC. Update PC with the latest value in case that happens. diff --git a/Source/Core/Core/Src/PowerPC/PowerPC.cpp b/Source/Core/Core/Src/PowerPC/PowerPC.cpp index b9eaf37189..2efcb4fd37 100644 --- a/Source/Core/Core/Src/PowerPC/PowerPC.cpp +++ b/Source/Core/Core/Src/PowerPC/PowerPC.cpp @@ -341,13 +341,10 @@ void UpdatePerformanceMonitor(u32 cycles, u32 num_load_stores, u32 num_fp_inst) break; } - if (MMCR0.PMC1INTCONTROL && (PowerPC::ppcState.spr[SPR_PMC1] & 80000000) != 0) - PowerPC::ppcState.Exceptions |= EXCEPTION_PERFORMANCE_MONITOR; - if (MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC2] & 80000000) != 0) - PowerPC::ppcState.Exceptions |= EXCEPTION_PERFORMANCE_MONITOR; - if (MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC3] & 80000000) != 0) - PowerPC::ppcState.Exceptions |= EXCEPTION_PERFORMANCE_MONITOR; - if (MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC4] & 80000000) != 0) + if ((MMCR0.PMC1INTCONTROL && (PowerPC::ppcState.spr[SPR_PMC1] & 0x80000000) != 0) || + (MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC2] & 0x80000000) != 0) || + (MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC3] & 0x80000000) != 0) || + (MMCR0.PMCINTCONTROL && (PowerPC::ppcState.spr[SPR_PMC4] & 0x80000000) != 0)) PowerPC::ppcState.Exceptions |= EXCEPTION_PERFORMANCE_MONITOR; } |