diff options
| author | JosJuice <josjuice@gmail.com> | 2021-05-28 15:34:08 +0200 |
|---|---|---|
| committer | JosJuice <josjuice@gmail.com> | 2021-05-28 15:34:08 +0200 |
| commit | e0c81ae54ad99ae8166121eee4abc54c97c32630 (patch) | |
| tree | 077fa3bd915cece7afcc9cd995630070333b69af /Source/Core | |
| parent | 52a388af9a92b7142972b5a37294cf926707be91 (diff) | |
JitArm64: Fix MSVC warnings
Diffstat (limited to 'Source/Core')
| -rw-r--r-- | Source/Core/Common/Arm64Emitter.cpp | 4 | ||||
| -rw-r--r-- | Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp index 4d6feb222f..bd206f8f4b 100644 --- a/Source/Core/Common/Arm64Emitter.cpp +++ b/Source/Core/Common/Arm64Emitter.cpp @@ -3122,11 +3122,11 @@ void ARM64FloatEmitter::FSQRT(ARM64Reg Rd, ARM64Reg Rn) void ARM64FloatEmitter::FRECPE(ARM64Reg Rd, ARM64Reg Rn) { - EmitScalar2RegMisc(0, 2 | IsDouble(Rd), 0x1D, Rd, Rn); + EmitScalar2RegMisc(0, IsDouble(Rd) ? 3 : 2, 0x1D, Rd, Rn); } void ARM64FloatEmitter::FRSQRTE(ARM64Reg Rd, ARM64Reg Rn) { - EmitScalar2RegMisc(1, 2 | IsDouble(Rd), 0x1D, Rd, Rn); + EmitScalar2RegMisc(1, IsDouble(Rd) ? 3 : 2, 0x1D, Rd, Rn); } // Scalar - 2 Source diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp index 8c950434f9..bb975f138f 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_FloatingPoint.cpp @@ -384,7 +384,7 @@ void JitArm64::fcmpX(UGeckoInstruction inst) gpr.BindCRToRegister(crf, false); const ARM64Reg XA = gpr.CR(crf); - ARM64Reg fpscr_reg; + ARM64Reg fpscr_reg = ARM64Reg::INVALID_REG; if (fprf) { fpscr_reg = gpr.GetReg(); |